BT8222EPFF CONEXANT [Conexant Systems, Inc], BT8222EPFF Datasheet - Page 10
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BT8222EPFF
Manufacturer Part Number
BT8222EPFF
Description
ATM Transmitter/Receiver with UTOPIA Interface
Manufacturer
CONEXANT [Conexant Systems, Inc]
Datasheet
1.BT8222EPFF.pdf
(161 pages)
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List of Tables
Table 3-10.
Table 3-11.
Table 3-12.
Table 3-13.
Table 3-14.
Table 3-15.
Table 3-16.
Table 3-17.
Table 3-18.
Table 3-19.
Table 3-20.
Table 3-21.
Table 3-22.
Table 3-23.
Table 3-24.
Table 4-1.
Table 4-2.
Table 4-3.
Table 4-4.
Table 4-5.
Table 4-6.
Table 4-7.
Table 4-8.
Table 4-9.
Table A-1.
HDR_MSKx Register Addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-22
ATM Transmitter/Receiver Status Registers, Counters, and Data Link Control . . . . . . . . . 3-28
STS-1,STS-3c, STM-1 LINE_STATUS Bit Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-30
DS3 PLCP and Direct Mapping Mode LINE_STATUS Bit Definitions. . . . . . . . . . . . . . . . . 3-31
E3 G.832, E4 G.832 LINE_STATUS Bit Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-32
E3 G.751 LINE_STATUS Bit Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-33
External Framer, 57-Octet Mode, LINE_STATUS Bit Definitions . . . . . . . . . . . . . . . . . . . . 3-34
Status Indications for All Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-35
Line and Interface Events/Errors Counters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-39
Counted Events . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-40
Internal STS-1, STS-3c Event/Error Counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-41
Internal DS3 PLCP and Direct Mapping Modes Event/Error Counters. . . . . . . . . . . . . . . . 3-42
Internal G.832 E3/E4 Event/Error Counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-43
Internal G.751 E3 Event/Error Counters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-44
External Framer, 57-Octet Mode Event/Error Counters . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-45
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-3
Microprocessor Interface Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-4
Line Interface Timing—DS1, E1, DS3, E3 External Framers . . . . . . . . . . . . . . . . . . . . . . . . 4-6
Line Interface Timing—Internal Framers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-7
Parallel Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-8
Overhead Port Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-9
FIFO Port Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-11
UTOPIA Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-13
TAXI Interface Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-15
Cell Thresholds (1 of 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-3
Conexant
ATM Transmitter/Receiver with UTOPIA Interface
CN8223
10046C
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