BT8375 CONEXANT [Conexant Systems, Inc], BT8375 Datasheet - Page 201
BT8375
Manufacturer Part Number
BT8375
Description
single chip transceivers for T1/E1 and Integrated Service Digital Network (ISDN) primary rate interfaces
Manufacturer
CONEXANT [Conexant Systems, Inc]
Datasheet
1.BT8375.pdf
(323 pages)
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Bt8370/8375/8376
Fully Integrated T1/E1 Framer and Line Interface
3.14 Clock Rate Adapter Registers
Unused bits indicated by a dash (—) are reserved and should be written to 0. Writing to reserved bits has no
effect.
CEN
XSEL[2:0]
N8370DSE
090—Clock Rate Adapter Configuration (CLAD_CR)
CEN
7
Enable CLAD Phase Detector—When active, the CPHASE detector compares the CLAD
reference (CLADI/RSCALE) to the CLAD variable (CLADV/VSCALE), and sends the
resulting phase error information to the NCO. When inactive, the CLADI signal is ignored and
JEN or JFREE [addr 002] selects the input timing reference.
Line Rate Multiple Select—The CLAD divider chain outputs (CLADO and CLADV) can be
programmed to operate at 2
multiplier. This is applicable only when OSEL or VSEL [addr 091] selects the multiplier
output.
XSEL[2]
6
NOTE:
CEN
XSEL[1]
0
0
0
0
0
1
1
1
4, 5, 6, 7
XSEL
5
0
1
2
3
JCLK always operates at T1 or E1 line rate selected by T1/E1N.
JEN
0
1
1
1
1
0
1
1
0
JFREE
XSEL[0]
to 2
Output (kHz)
T1/E1N = 0
1
1
1
0
0
0
0
0
4
Conexant
16384
3
2048
4096
8192
—
times (1 X to 32 X) the T1/E1 line rate. XSEL chooses the
JDIR
X
X
0
1
0
1
0
1
LFGAIN[3]
REFCKI = Free running 10 MHz clock
REFCKI = Free running 10 MHz clock with transmit
JAT
REFCKI = Free running 10 MHz clock with receive
JAT
TXCLK = TCKI or ACKI per AISCLK [addr 068]
RXCLK = RPLL or RCKI per RDIGI [addr 020]
CLADI = System clock, bypass JAT elastic store
CLADI = System clock, with transmit JAT
CLADI = System clock, with receive JAT
3
Output (kHz)
T1/E1N = 1
12352
1544
3088
6176
—
CLAD Input Timing Reference
LFGAIN[2]
2
3.14 Clock Rate Adapter Registers
Line Rate Multiplier
LFGAIN[1]
1
Reserved
1X
2X
4X
8X
LFGAIN[0]
0
3-83
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