BT8375 CONEXANT [Conexant Systems, Inc], BT8375 Datasheet - Page 233
BT8375
Manufacturer Part Number
BT8375
Description
single chip transceivers for T1/E1 and Integrated Service Digital Network (ISDN) primary rate interfaces
Manufacturer
CONEXANT [Conexant Systems, Inc]
Datasheet
1.BT8375.pdf
(323 pages)
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Bt8370/8375/8376
Fully Integrated T1/E1 Framer and Line Interface
RSBI[1:0]
OFFSET[2:0]
N8370DSE
0D2—RSB Sync Bit Offset (RSYNC_BIT)
—
7
Receive Slip Buffer Interface mode—Selects configuration of RSLIP buffer. RSBI determines
total buffer depth and initial delay conditions. While RSLIP is bypassed, RCKO clocks RSB
outputs and RSBCKI is ignored. RFSYNC and RMSYNC are also ignored in Bypass mode if
they are programmed as inputs. RFSYNC and RMSYNC must be programmed as outputs if
RSB [1:0] selects either bypass or Elastic buffer mode.
RSB Sync Bit Offset—Selects which RSB bit number coincides with RFSYNC and RMSYNC
sync pulses. Sync pulses are programmed to align to 1 bit in relation to RPCMO, RSIGO,
RINDO, and SIGFRZ time slots. If the sync pulses are desired to coincide with location of T1
F-bit or time slot 0 Bit 1, OFFSET is programmed to equal 0. Sync bit offset is added to time
slot offset [RSYNC_TS; addr 0D3] to form a 10-bit OFFSET value that applies to RFSYNC
location, which is then added to frame offset [RSYNC_FRM; addr 0D8]. This forms a 15-bit
OFFSET value that applies to the RMSYNC location. Both RFSYNC and RMSYNC offsets
are expressed as RSB.OFFSET, allowing the system to generate or accept sync pulses at any
bit location within the RSB multiframe.
NOTE(S):
following procedure can be applied:
RSBI
—
6
00
01
10
11
1.
2.
3.
Disable slip buffer
Center slip buffer
Set the slip buffer to Elastic Mode.
To guarantee the pointer in the slip buffer is initialized properly during Elastic Mode, the
Normal
Bypass
Elastic
Mode
Short
OFFSET[2:0]
—
5
000
001
110
111
|
Total Depth
2 Frame
2 Frame
64 Bits
0 Bits
—
4
Conexant
RSYNC Location
Bit 1 or F-bit
0.5 to 1.5 Frames
Initial Delay
Bit 2
Bit 7
Bit 8
1 Frame
32 Bits
32 Bits
|
0 Bits
—
3
RSBI[1:0] = 10, RSB_CTR = 0
RSBI[1:0] = 11, RSB_CTR = 0
RSBI[1:0] = 11, RSB_CTR = 0
OFFSET[2]
2
Recenters automatically upon slip
Reverts to normal upon slip
When RFSYNC is output
When RFSYNC is input
RSBCKI ignored
OFFSET[1]
Conditions
3.17 System Bus Registers
1
OFFSET[0]
0
3-115
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