P4C1298 PYRAMID [Pyramid Semiconductor Corporation], P4C1298 Datasheet - Page 7

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P4C1298

Manufacturer Part Number
P4C1298
Description
ULTRA HIGH SPEED 64K x 4 STATIC CMOS RAM
Manufacturer
PYRAMID [Pyramid Semiconductor Corporation]
Datasheet
TIMING WAVEFORM OF WRITE CYCLE NO. 2 (CE
AC TEST CONDITIONS
Document # SRAM135 REV OR
* including scope and test fixture.
Note:
Because of the ultra-high speed of the P4C1298, care must be taken
when testing this device; an inadequate setup can cause a normal
functioning part to be rejected as faulty. Long high-inductance leads
that cause supply bounce must be avoided by bringing the V
ground planes directly up to the contactor fingers. A 0.01 µF high
Input Pulse Levels
Input Rise and Fall Times
Input Timing Reference Level
Output Timing Reference Level
Output Load
Figure 1. Output Load
See Figures 1 and 2
GND to 3.0V
1.5V
1.5V
3ns
CC
and
CE
CE
CE
CE CONTROLLED)
TRUTH TABLE
frequency capacitor is also required between V
signal reflections, proper termination must be used; for example, a 50
test environment should be terminated into a 50
(Thevenin Voltage) at the comparator input, and a 116
be used in series with D
Mode
Standby
Read
Write
Figure 2. Thevenin Equivalent
CE
CE
CE
CE
CE
H
L
L
OUT
(9,10)
to match 166
WE
WE
WE
WE
WE
X
H
L
Output
High Z
D
D
OUT
(Thevenin Resistance).
IN
CC
and ground. To avoid
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load with 1.73V
Power
Standby
Active
Active
P4C1298/L
resistor must

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