ZR36067PQC ETC [List of Unclassifed Manufacturers], ZR36067PQC Datasheet - Page 28

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ZR36067PQC

Manufacturer Part Number
ZR36067PQC
Description
AV PCI CONTROLLER
Manufacturer
ETC [List of Unclassifed Manufacturers]
Datasheet

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Part Number
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Part Number:
ZR36067PQC
Manufacturer:
ZORAN
Quantity:
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AV PCI CONTROLLER
Address Offset: 0x018 (Continued)
13.8 Masking Map “Top” Register
This register contains the DWORD base address of the top
masking map.
Address Offset: 0x01C
13.9 Masking Map “Bottom” Register
This register contains the DWORD base address of the bottom
masking map.
Address Offset: 0x020
23:22
21:12
11:10
31:2
31:2
9:0
Bit
1:0
Bit
1:0
Bit
Type
Type
Type
RW
RW
RW
RW
R
R
R
R
Mod
Mod
Mod
vid
vid
vid
vid
Description
Reserved. Returns zero.
VidWinHt - Video Window Height.
This register defines the number of lines that
should be displayed by the ZR36067.
If DispMod = 0, VidWinHt is half the number,
if DispMod = 1, it is the entire number of
display lines.
Default value is 0x0F0.
Reserved. Returns zero.
VidWinWid - Video Window Width.
This register defines the width of the video
window in number of pixels.
Default value is 0x3FF.
MaskTopBase - Masking Map Top Base
Address.
This is the source starting address of the top
field for the masking map read transfers.
Default value is 0xFFFFFFFC.
Bits 1..0 are hardwired to 00b.
MaskBotBase - Masking Map Bottom Base
Address.
This is the source starting address of the
bottom field for the masking map read trans-
fers.
Default value is 0xFFFFFFFC.
Bits 1..0 are hardwired to 00b.
Description
Description
28
13.10 Overlay Control Register
This register contains the parameters controlling overlay (byte 1)
and masking map addressing (byte 0).
Address Offset: 0x024
31:16
14:8
Bit
7:0
15
Type
RW
RW
R
R
Mod
vid
vid
Reserved. Returns zero.
OvlEnable - Overlay Enable flag.
When enabled the masking information in the
video mask is evaluated to allow overlay of
other windows or graphics.
When disabled the video window is always on
top.
‘1’ - overlay enabled,
‘0’ - overlay disabled (default value).
Reserved. Returns zero.
MaskStride. This register defines the
address increment in doublewords that is
needed to get from the end of a mask line to
the beginning of the next.
If the address difference between two con-
secutive mask lines in main memory is zero
(i.e, they are physically consecutive) then
MaskStride should be set (by the driver soft-
ware) to zero (if DispMode=1) or the mask
line size in doublewords (if DispMode=0).
Default value is 0xFF.
Description

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