K9F6408Q0C-H SAMSUNG [Samsung semiconductor], K9F6408Q0C-H Datasheet - Page 7

• Manufacturer Part Number: K9F6408Q0C-H
• Description: 8M x 8 Bit Bit NAND Flash Memory
• Manufacturer: SAMSUNG [Samsung semiconductor]

Figure 1. FUNCTIONAL BLOCK DIAGRAM
Figure 2. ARRAY ORGANIZATION
K9F6408Q0C
K9F6408U0C
(=1,024 Blocks)
16K Pages
V
V
CC
SS
NOTE : Column Address : Starting Address of the Register.
2nd Cycle
3rd Cycle
1st Cycle
CE
RE
WE
00h Command(Read) : Defines the starting address of the 1st half of the register.
01h Command(Read) : Defines the starting address of the 2nd half of the register.
* A
* L must be set to "Low".
* The device ignores any additional input of address cycles than reguired.
Command
8
A
A
is set to "Low" or "High" by the 00h or 01h Command.
1st half Page Register
(=256 Bytes)
9
0
- A
- A
I/O 0
22
A
7
A
A
17
0
9
Page Register
512Byte
512 Byte
& High Voltage
I/O 1
CLE
Control Logic
A
A
A
10
18
Command
X-Buffers
Latches
& Decoders
Y-Buffers
Latches
& Decoders
Generator
1
Register
2nd half Page Register
(=256 Bytes)
ALE
I/O 2
A
A
A
A
8
11
19
WP
2
I/O 3
16 Byte
16 Byte
A
A
A
12
20
3
7
I/O 4
A
A
A
13
21
4
I/O 0 ~ I/O 7
2nd half Page Register & S/A
1st half Page Register & S/A
Global Buffers
I/O 5
(512 + 16)Byte x 16384
A
A
A
14
22
I/O Buffers & Latches
5
8 bit
64M + 2M Bit
NAND Flash
1 Page = 528 Byte
1 Block = 528 Byte x 16 Pages
1 Device = 528 Byte x 16Pages x 1024 Blocks
1 Block =16 Pages
Y-Gating
Y-Gating
= (8K + 256) Byte
ARRAY
I/O 6
A
A
*L
15
6
= (8K + 256) Byte
= 66 Mbits
I/O 7
A
A
*L
16
FLASH MEMORY
7
Output
Driver
Column Address
Row Address
(Page Address)
V
Vcc/Vcc
SS
I/0 0
I/0 7
Q