EMC326SP16AK Emlsi Inc., EMC326SP16AK Datasheet - Page 52
EMC326SP16AK
Manufacturer Part Number
EMC326SP16AK
Description
2mx16 Bit Cellularram
Manufacturer
Emlsi Inc.
Datasheet
1.EMC326SP16AK.pdf
(64 pages)
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Figure 41. Burst WRITE at End-of-Row (Wrap Off)
Note:
1. Non-default BCR settings for burst WRITE at end of row: fixed or variable latency, WAIT active LOW, WAIT asserted during delay.
2. For burst WRITEs, CE# must go HIGH before the second CLK after the WAIT period begins(before the second CLK after WAIT asserts with
DQ[15:0]
(shown as solid line)
BCR[8]=0, or before the third CLK after WAIT asserts with BCR[8]=1).
UB#/LB#
A[20:0]
ADV#
WAIT
WE#
CLK
OE#
CE#
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
OH
OL
t
CLK
t
SP
Input
Valid
t
End of row
HD
t
t
KOH
KHTL
t
HD
Valid
Input
t
HZ
Note 2
52
t
t
HZ
CSP
EMC326SP16AK
2Mx16 CellularRAM
High-Z
Don’t Care
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