EMC326SP16AK Emlsi Inc., EMC326SP16AK Datasheet - Page 63
EMC326SP16AK
Manufacturer Part Number
EMC326SP16AK
Description
2mx16 Bit Cellularram
Manufacturer
Emlsi Inc.
Datasheet
1.EMC326SP16AK.pdf
(64 pages)
- Current page: 63 of 64
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Figure 52. Asynchronous WRITE Followed by Asynchronous READ
Note:
1. When configured for synchronous mode (BCR[15] = 0), CE# must remain HIGH for at least 5ns (t
interval. Otherwise, t
LB#/UB#
DQ[15:0]
IN/OUT
A[20:0]
ADV#
WAIT
WE#
OE#
CE#
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
IH
IL
OH
OL
IH
IL
CPH
High-Z
is only required after CE#-controlled WRITEs.
Valid Address
t
AVS
t
t
CVS
AS
t
VP
t
CW
t
WP
t
Data
AVH
t
DH
t
WPH
t
WC
t
AS
Valid Address
t
t
AW
BW
t
VS
t
Data
DW
t
WR
63
t
Note 1
CPH
V
V
OH
OL
t
BLZ
High-Z
t
LZ
CPH
t
AA
) to schedule the appropriate refresh
Valid Address
t
OLZ
EMC326SP16AK
Don’t Care
t
OE
2Mx16 CellularRAM
Valid Output
t
HZ
t
Undefined
BHZ
t
OHZ
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