E28F320J5100 Intel, E28F320J5100 Datasheet - Page 34

• Manufacturer Part Number: E28F320J5100
• Manufacturer: Intel

INTEL
34
Yes
Yes
®
StrataFlash™ MEMORY TECHNOLOGY, 32 AND 64 MBIT
Program Buffer to Flash
Write Next Buffer Data,
Command E8H, Block
Count, Block Address
Read Status Register
Issue Write to Buffer
Write Word or Byte
Buffer Command?
Write Buffer Data,
Another Write to
Check if Desired
Device Address
Read Extended
Status Register
Start Address
Abort Write to
Set Time-Out
Programming
Confirm D0H
Full Status
X = X + 1
Complete
Address
XSR.7 =
X = N?
Buffer?
SR.7 =
Check
X = 0
Start
No
No
No
1
1
Yes
0
0
No
Buffer Time-Out?
Write to Another
Figure 7. Write to Buffer Flowchart
Block Address
Write to Buffer
Write to
Aborted
Status Command
Issue Read
Yes
1. Byte or word count values on DQ
count register. Count ranges on this device for byte mode are N
= 00H to 1FH and for word mode are N = 0000H to 000FH.
2. The device now outputs the status register when read (XSR is
no longer available).
3. Write Buffer contents will be programmed at the device start
address or destination flash address.
4. Align the start address on a Write Buffer boundary for
maximum programming performance (i.e., A
address = 0).
5. The device aborts the Write to Buffer command if the current
address is outside of the original block address.
6. The status register indicates an "improper command
sequence" if the Write to Buffer command is aborted. Follow this
with a Clear Status Register command.
Full status check can be done after all erase and write sequences
complete. Write FFH after the last operation to reset the device to
read array mode.
Operation
(Note 1, 2)
(Note 3, 4)
(Note 5, 6)
Standby
Standby
Write
Read
Write
Write
Write
Write
Read
Bus
Program Buffer
Write to Buffer
Command
to Flash
Confirm
PRELIMINARY
Data = E8H
Block Address
XSR. 7 = Valid
Addr = Block Address
Check XSR. 7
1 = Write Buffer Available
0 = Write Buffer Not Available
Data = N = Word/Byte Count
N = 0 Corresponds to Count = 1
Addr = Block Address
Data = Write Buffer Data
Addr = Device Start Address
Data = Write Buffer Data
Addr = Device Address
Data = D0H
Addr = Block Address
Status Register Data with the
Device Enabled, OE# Low
Updates SR
Addr = Block Address
Check SR.7
1 = WSM Ready
0 = WSM Busy
0
-DQ
7
are loaded into the
Comments
4
- A
0
of the start
0606_07