ATTINY26L8SU SL383 Atmel, ATTINY26L8SU SL383 Datasheet - Page 101
ATTINY26L8SU SL383
Manufacturer Part Number
ATTINY26L8SU SL383
Description
MCU 8-Bit ATtiny AVR RISC 2KB Flash 3.3V/5V 20-Pin SOIC T/R
Manufacturer
Atmel
Datasheet
1.ATTINY26L8PU.pdf
(185 pages)
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ADC Noise Canceler
Function
ADC Conversion Result
1477J–AVR–06/07
Special care should be taken when changing differential channels. Once a differential
channel has been selected, the gain stage may take as much as 125 µs to stabilize to
the new value. Thus conversions should not be started within the first 125 µs after
selecting a new differential channel. Alternatively, conversion results obtained within this
period should be discarded.
The same settling time should be observed for the first differential conversion after
changing ADC reference (by changing the REFS1:0 bits in ADMUX).
The ADC features a noise canceler that enables conversion during ADC Noise Reduc-
tion mode (see “Power Management and Sleep Modes” on page 38) to reduce noise
induced from the CPU core and other I/O peripherals. If other I/O peripherals must be
active during conversion, this mode works equivalently for Idle mode. To make use of
this feature, the following procedure should be used:
1. Make sure that the ADC is enabled and is not busy converting. Single Conver-
2. Enter ADC Noise Reduction mode (or Idle mode). The ADC will start a conver-
3. If no other interrupts occur before the ADC conversion completes, the ADC inter-
After the conversion is complete (ADIF is high), the conversion result can be found in
the ADC Result Registers (ADCL, ADCH).
For single ended conversion, the result is
where V
ence (see Table 45 on page 103 and Table 46 on page 104). 0x000 represents analog
ground, and 0x3FF represents the selected reference voltage minus one LSB.
If differential channels are used, the result is
where V
input pin, GAIN the selected gain factor, and V
in mind that V
0x000. Figure 56 shows the decoding of the differential input range.
Table 44 shows the resulting output codes if the differential input channel pair (ADCn -
ADCm) is selected with a gain of GAIN and a reference voltage of V
sion mode must be selected and the ADC conversion complete interrupt must be
enabled.
ADEN = 1
ADSC = 0
ADFR = 0
ADIE = 1
sion once the CPU has been halted.
rupt will wake up the CPU and execute the ADC Conversion Complete interrupt
routine.
IN
POS
is the voltage on the selected input pin and V
is the voltage on the positive input pin, V
POS
must be higher than V
ADC
=
(
---------------------------------------------------------------------------
V
POS
ADC
–
V
=
NEG
V
--------------------------
NEG
V
IN
REF
V
) GAIN 1024
, otherwise, the ADC value will saturate at
⋅
REF
⋅
1024
REF
the selected voltage reference. Keep
⋅
NEG
REF
the voltage on the negative
the selected voltage refer-
ATtiny26(L)
REF
.
101
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