ATTINY26L8SU SL383 Atmel, ATTINY26L8SU SL383 Datasheet - Page 70

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ATTINY26L8SU SL383

Manufacturer Part Number
ATTINY26L8SU SL383
Description
MCU 8-Bit ATtiny AVR RISC 2KB Flash 3.3V/5V 20-Pin SOIC T/R
Manufacturer
Atmel
Datasheet
70
ATtiny26(L)
Figure 39. Timer/Counter1 Synchronization Register Block Diagram
Timer/Counter1 and the prescaler allow running the CPU from any clock source while
the prescaler is operating on the fast 64 MHz PCK clock in the asynchronous mode.
Note that the system clock frequency must be lower than one half of the PCK frequency.
Only when the system clock is generated from PCK dividing that by two, the ratio of the
PCK/system clock can be exactly two. The synchronization mechanism of the asynchro-
nous Timer/Counter1 needs at least two edges of the PCK when the system clock is
high. If the frequency of the system clock is too high, it is a risk that data or control val-
ues are lost.
The following Figure 40 shows the block diagram for Timer/Counter1.
PCKE
CK
PCK
SYNC
MODE
ASYNC
MODE
IO-registers
OCR1A
OCR1B
OCR1C
TCCR1A
TCCR1B
TCNT1
OCF1A
OCF1B
TOV1
1/2PCK -1CK delay
Input syncronization
registers
1CK delay
S
A
OCR1A_SI
OCR1B_SI
OCR1C_SI
TCCR1A_SI
TCCR1B_SI
TCNT1_SI
OCF1A_SI
OCF1B_SI
TOV1_SI
1PCK delay
8-BIT DATABUS
S
A
Timer/Counter1
TCNT1
1/2PCK -1CK delay
Output
syncronization
registers
TCNT_SO
OCF1A_SO
OCF1B_SO
TOV1_SO
no delay
no delay
Output
multiplexers
S
A
S
A
S
A
S
A
1477J–AVR–06/07
TCNT1
OCF1A
OCF1B
TOV1

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