MX29LV320ETTI-70G Macronix, MX29LV320ETTI-70G Datasheet - Page 6
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MX29LV320ETTI-70G
Manufacturer Part Number
MX29LV320ETTI-70G
Description
MX29LV Series 3 V 32 Mb (4M x 8/2M x 16) 70 ns Parallel Flash - TSOP-48
Manufacturer
Macronix
Datasheet
1.MX29LV320EBTI-70G.pdf
(68 pages)
Available stocks
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Quantity
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Part Number:
MX29LV320ETTI-70G
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TYCO
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Part Number:
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MX29LV320E T/B
PACKAGE
• 44-Pin SOP
• 48-Pin TSOP
• 48-Ball TFBGA (6 x 8mm)
• 48-Ball LFBGA (6 x 8mm)
• All devices are RoHS Compliant
GENERAL DESCRIPTION
MX29LV320E T/B is a 32Mbit flash memory that can be organized as 4Mbytes of 8 bits each or 2Mbytes of 16
bits each. These devices operate over a voltage range of 2.7V to 3.6V typically using a 3V power supply input.
The memory array is divided into 64 equal 64 Kilo byte blocks. However, depending on the device being used
as a Top-Boot or Bottom-Boot device, the top or the bottom first block is further subdivided into 8 equal 8Kbyte
blocks. The outermost two sectors at the top or at the bottom can be protected at the boot blocks for this device.
This flash memory also provides an additional factory lockable or customer lockable 256byte sector to provide
security feature.
The MX29LV320E T/B is offered in a 44-pin SOP, a 48-pin TSOP and a 48-ball BGA(TFBGA/LFBGA) JEDEC
standard package. These packages are offered in leaded, as well as lead-free versions that are compliant to the
RoHS specifications. The software algorithm used for this device also adheres to the JEDEC standard for single
power supply devices. These flash parts can be programmed in system or on commercially available EPROM/
Flash programmers.
Separate OE# and CE# (Output Enable and Chip Enable) signals are provided to simplify system design. When
used with high speed processors, the 70ns read access time of this flash memory permits operation with minimal
time lost due to system timing delays.
The automatic erase algorithm provided on Macronix flash memories perform an automatic program prior to pro-
gram. The user only needs to provide a write command to the command register. The on-chip state machine au-
tomatically controls the program and erase functions including all necessary internal timings. Since erase opera-
tions take much longer time than read operations, erase can be interrupted to perform read operations in other
sectors of the device. For this, Erase Suspend operation along with erase resume operation are provided. Data#
polling or toggle bits are used to indicate the end of the erase/program operation.
These devices are manufactured at the Macronix fabrication facility using the time tested and proven Macronix's
advanced technology. This proprietary non-epi process provides a very high degree of latch-up protection for
stresses up to 100 milliamperes on address and data pins from -1V to 1.5xVCC.
With low power consumption and enhanced hardware and software features, this flash memory retains data reli-
ably for at least twenty years. Erase and programming functions have been tested to meet a typical specification
of 100,000 cycles of operation.
P/N:PM1575
REV. 1.2, MAY 23, 2011
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