ADC1213D080HN-C1 IDT, ADC1213D080HN-C1 Datasheet - Page 24

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ADC1213D080HN-C1

Manufacturer Part Number
ADC1213D080HN-C1
Description
Analog to Digital Converters - ADC
Manufacturer
IDT
Datasheet

Specifications of ADC1213D080HN-C1

Rohs
yes
Integrated Device Technology
ADC1213D_SER 8
Product data sheet
Fig 23. Transfer diagram for two data bytes (3-wire type)
SCLK
SDIO
CS
R/W W1
11.6.2 Channel control
W0
A12 A11 A10
The steps for a data transfer:
The two ADC channels can be configured at the same time or separately. By using the
register “Channel index”, the user can choose which ADC channel receives the next
SPI-instruction. By default the channel A and B receives the same instructions in write
mode. In read mode only A is active.
1. The falling edge on pin CS in combination with a rising edge on pin SCLK determine
2. The first phase is the transfer of the 2-byte instruction.
3. The second phase is the transfer of the data which can vary in length but is always be
4. A rising edge on pin CS indicates the end of data transmission.
the start of communications.
a multiple of 8 bits. The MSB is always sent first (for instruction and data bytes)
A9
Instruction bytes
A8
A7
A6
A5
A4
A3
Rev. 08 — 2 July 2012
A2
A1
A0
D7
D6
D5
Register N (data)
Dual 12-bit ADC; serial JESD204A interface
D4
D3
D2
ADC1213D series
D1
D0
D7
D6
D5
Register N + 1 (data)
D4
D3
© IDT 2012. All rights reserved.
D2
D1
005aaa086
D0
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