ADC1213D080HN-C1 IDT, ADC1213D080HN-C1 Datasheet - Page 33

• Manufacturer Part Number: ADC1213D080HN-C1
• Description: Analog to Digital Converters - ADC
• Manufacturer: IDT

Specifications of ADC1213D080HN-C1

• Rohs: yes

Integrated Device Technology
Table 40.
Default values are highlighted.
Table 41.
Default values are highlighted.
Table 42.
Default values are highlighted.
Table 43.
Default values are highlighted.
Table 44.
Default values are highlighted.
Table 45.
Default values are highlighted.
Table 46.
Default values are highlighted.
ADC1213D_SER 8
Product data sheet
Bit
7 to 5
4 to 0
Bit
7 to 1
0
Bit
7
6
5 to 4
3 to 0
Bit
7 to 5
4 to 0
Bit
7 to 1
0
Bit
7
6 to 2
1 to 0
Bit
7 to 5
4 to 0
Symbol
-
K[4:0]
Symbol
-
M
Symbol
-
CS[0]
-
N[3:0]
Symbol
-
NP[4:0]
Symbol
-
S
Symbol
HD
-
CF[1:0]
Symbol
-
LID[4:0]
Cfg_5_K (address 0824h)
Cfg_6_M (address 0825h)
Cfg_7_CS_N (address 0826h)
Cfg_8_Np (address 0827h)
Cfg_9_S (address 0828h)
Cfg_10_HD_CF (address 0829h)
Cfg_01_2_LID (address 082Ch)
Access
-
R/W
Access
-
R/W
Access
-
R/W
-
R/W
Access
-
R/W
Access
-
R/W
Access
R/W
-
R/W
Access
-
R/W
Value
000
01000
Value
0000000
0
Value
0
1
00
0010
Value
000
01111
Value
0000000
0
Value
0
00000
00
Value
000
11011
Rev. 08 — 2 July 2012
Description
not used
defines the number of frames per multiframe, minus 1
Description
not used
defines the number of converters per device, minus 1
Description
not used
defines the number of control bits per sample, minus 1
not used
defines the converter resolution
Description
not used
defines the total number of bits per sample, minus 1
Description
not used
defines number of samples per converter per frame cycle
Description
defines high density format
not used
defines number of control words per frame clock cycle per link
Description
not used
defines lane 0 identification number
Dual 12-bit ADC; serial JESD204A interface
ADC1213D series
© IDT 2012. All rights reserved.
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