S9S12G240F0CLFR Freescale Semiconductor, S9S12G240F0CLFR Datasheet - Page 612
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S9S12G240F0CLFR
Manufacturer Part Number
S9S12G240F0CLFR
Description
16-bit Microcontrollers - MCU 16BIT 240KB FLASH
Manufacturer
Freescale Semiconductor
Datasheet
1.S9S12G96F0CLL.pdf
(1292 pages)
Specifications of S9S12G240F0CLFR
Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
240 KB
Data Ram Size
4 KB
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-48
Mounting Style
SMD/SMT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
S9S12G240F0CLFR
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Freescale’s Scalable Controller Area Network (S12MSCANV3)
18.3.3.1.2
614
Module Base + 0x00X0
Module Base + 0x00X1
ID[10:3]
ID[2:0]
Field
Field
RTR
IDE
7-0
7-5
4
3
Reset:
Reset:
W
W
R
R
Standard Format Identifier — The identifiers consist of 11 bits (ID[10:0]) for the standard format. ID10 is the
most significant bit and is transmitted first on the CAN bus during the arbitration procedure. The priority of an
identifier is defined to be highest for the smallest binary number. See also ID bits in
Standard Format Identifier — The identifiers consist of 11 bits (ID[10:0]) for the standard format. ID10 is the
most significant bit and is transmitted first on the CAN bus during the arbitration procedure. The priority of an
identifier is defined to be highest for the smallest binary number. See also ID bits in
Remote Transmission Request — This flag reflects the status of the Remote Transmission Request bit in the
CAN frame. In the case of a receive buffer, it indicates the status of the received frame and supports the
transmission of an answering frame in software. In the case of a transmit buffer, this flag defines the setting of
the RTR bit to be sent.
0 Data frame
1 Remote frame
ID Extended — This flag indicates whether the extended or standard identifier format is applied in this buffer. In
the case of a receive buffer, the flag is set as received and indicates to the CPU how to process the buffer
identifier registers. In the case of a transmit buffer, the flag indicates to the MSCAN what type of identifier to send.
0 Standard format (11 bit)
1 Extended format (29 bit)
IDR0–IDR3 for Standard Identifier Mapping
ID10
ID2
7
x
7
x
Table 18-31. IDR0 Register Field Descriptions — Standard
Figure 18-30. Identifier Register 0 — Standard Mapping
Figure 18-31. Identifier Register 1 — Standard Mapping
= Unused; always read ‘x’
ID9
ID1
6
x
6
x
Table 18-32. IDR1 Register Field Descriptions
MC9S12G Family Reference Manual,
ID8
ID0
5
x
5
x
RTR
ID7
4
x
4
x
Description
Description
IDE (=0)
ID6
x
x
3
3
Rev.1.23
ID5
2
x
2
x
Table
Table
Freescale Semiconductor
ID4
18-32.
18-31.
x
x
1
1
ID3
0
x
0
x
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