S9S12G240F0CLFR Freescale Semiconductor, S9S12G240F0CLFR Datasheet - Page 892
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S9S12G240F0CLFR
Manufacturer Part Number
S9S12G240F0CLFR
Description
16-bit Microcontrollers - MCU 16BIT 240KB FLASH
Manufacturer
Freescale Semiconductor
Datasheet
1.S9S12G96F0CLL.pdf
(1292 pages)
Specifications of S9S12G240F0CLFR
Rohs
yes
Core
S12
Processor Series
MC9S12G
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
240 KB
Data Ram Size
4 KB
On-chip Adc
Yes
Operating Supply Voltage
3.13 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
LQFP-48
Mounting Style
SMD/SMT
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
S9S12G240F0CLFR
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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48 KByte Flash Module (S12FTMRG48K1V1)
All assigned bits in the FERCNFG register are readable and writable.
26.3.2.7
The FSTAT register reports the operational status of the Flash module.
1
CCIF, ACCERR, and FPVIOL bits are readable and writable, MGBUSY and MGSTAT bits are readable
but not writable, while remaining bits read 0 and are not writable.
894
Reset value can deviate from the value shown if a double bit fault is detected during the reset sequence (see
Offset Module Base + 0x0005
Offset Module Base + 0x0006
Reset
DFDIE
Reset
SFDIE
Field
1
0
W
W
R
R
CCIF
Double Bit Fault Detect Interrupt Enable — The DFDIE bit controls interrupt generation when a double bit fault
is detected during a Flash block read operation.
0 DFDIF interrupt disabled
1 An interrupt will be requested whenever the DFDIF flag is set (see
Single Bit Fault Detect Interrupt Enable — The SFDIE bit controls interrupt generation when a single bit fault
is detected during a Flash block read operation.
0 SFDIF interrupt disabled whenever the SFDIF flag is set (see
1 An interrupt will be requested whenever the SFDIF flag is set (see
Flash Status Register (FSTAT)
0
0
1
7
7
Figure 26-10. Flash Error Configuration Register (FERCNFG)
= Unimplemented or Reserved
= Unimplemented or Reserved
0
0
0
0
6
6
Figure 26-11. Flash Status Register (FSTAT)
Table 26-14. FERCNFG Field Descriptions
MC9S12G Family Reference Manual,
ACCERR
0
0
0
5
5
FPVIOL
0
0
0
4
4
Description
MGBUSY
0
0
0
3
3
Rev.1.23
Section
Section
Section
RSVD
26.3.2.8)
0
0
0
2
2
26.3.2.8)
26.3.2.8)
Freescale Semiconductor
DFDIE
0
0
1
1
1
MGSTAT[1:0]
Section
SFDIE
0
0
0
0
1
26.6).
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