S9S12P64J0CFTR Freescale Semiconductor, S9S12P64J0CFTR Datasheet - Page 548

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S9S12P64J0CFTR

Manufacturer Part Number
S9S12P64J0CFTR
Description
16-bit Microcontrollers - MCU 16-bit 64K Flash
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of S9S12P64J0CFTR

Rohs
yes
Core
S12
Processor Series
MC9S12P
Data Bus Width
16 bit
Maximum Clock Frequency
25 MHz
Program Memory Size
64 KB
Data Ram Size
4 KB
On-chip Adc
Yes
Operating Supply Voltage
3.15 V to 5.5 V
Operating Temperature Range
- 40 C to + 125 C
Package / Case
QFN-48
Mounting Style
SMD/SMT
Detailed Register Address Map
0x0020-0x002F Debug Module (S12SDBG) Map
1. This represents the contents if the Comparator A or C control register is blended into this address
2. This represents the contents if the Comparator B or D control register is blended into this address
3. This represents the contents if the Comparator B or D control register is blended into this address
0x0030-0x0033 Reserved
0x0034-0x003F Clock Reset and Power Management (CPMU) Map
548
Address
Address
Address
0x002C
0x002D
0x002A
0x002B
0x002E
0x002F
0x0028
0x0029
0x0030
0x0031
0x0032
0x0033
0x0034
0x0035 CPMUREFDIV
0x0036
0x0037
(3)
CPMUPOSTDI
CPMUSYNR
DBGADHM
DBGADLM
CPMUFLG
DBGCCTL
DBGXAM
DBGXAH
DBGADH
Reserved
Reserved
Reserved
Reserved
DBGADL
DBGXAL
Name
Name
Name
V
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Bit 15
Bit 15
Bit 15
RTIF
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
VCOFRQ[1:0]
REFFRQ[1:0]
0
0
0
0
0
0
0
S12P-Family Reference Manual, Rev. 1.13
PORF
Bit 6
Bit 6
Bit 6
14
14
14
0
0
6
6
0
0
0
0
0
6
LVRF
Bit 5
Bit 5
Bit 5
TAG
13
13
13
0
5
5
5
0
0
0
0
0
0
LOCKIF
Bit 4
Bit 4
Bit 4
BRK
12
12
12
0
4
4
4
0
0
0
0
0
LOCK
Bit 3
Bit 3
Bit 3
RW
11
11
11
0
3
3
3
0
0
0
0
SYNDIV[5:0]
POSTDIV[4:0]
RWE
Bit 2
Bit 2
Bit 2
ILAF
10
10
10
0
2
2
2
0
0
0
0
REFDIV[3:0]
Freescale Semiconductor
OSCIF
Bit 1
Bit 1
Bit 1
17
0
9
1
9
1
9
1
0
0
0
0
COMPE
UPOSC
Bit 16
Bit 0
Bit 0
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
0
0
0
0

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