S912XEP100J5VAGR Freescale Semiconductor, S912XEP100J5VAGR Datasheet - Page 938

• Manufacturer Part Number: S912XEP100J5VAGR
• Description: 16-bit Microcontrollers - MCU 16-bit 1000K Flash
• Manufacturer: Freescale Semiconductor

Specifications of S912XEP100J5VAGR

• Rohs: yes
• Core: HCS12X
• Processor Series: MC9S12
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 50 MHz
• Program Memory Size: 1000 KB
• Data Ram Size: 64 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 3.3 V to 5 V
• Operating Temperature Range: - 40 C to + 125 C
• Package / Case: LQFP-144
• Mounting Style: SMD/SMT

Chapter 25 256 KByte Flash Module (S12XFTM256K2V1)
25.4.2.14 Set Field Margin Level Command
The Set Field Margin Level command, valid in special modes only, causes the Memory Controller to set
the margin level specified for future read operations of a specific P-Flash or D-Flash block.
Upon clearing CCIF to launch the Set Field Margin Level command, the Memory Controller will set the
field margin level for the targeted block and then set the CCIF flag.
938
FERSTAT
Register
FSTAT
User margin levels can be used to check that Flash memory contents have
adequate margin for normal level read operations. If unexpected results are
encountered when checking Flash memory contents at user margin levels, a
potential loss of information has been detected.
CCOBIX[2:0]
Table 25-60. Set Field Margin Level Command FCCOB Requirements
000
001
MGSTAT1
MGSTAT0
EPVIOLIF
ACCERR
Table 25-59. Set User Margin Level Command Error Handling
Error Bit
FPVIOL
1. Read margin to the erased state
2. Read margin to the programmed state
(CCOBIX=001)
Table 25-58. Valid Set User Margin Level Settings
0x0002
CCOB
MC9S12XE-Family Reference Manual Rev. 1.25
Set if CCOBIX[2:0] != 001 at command launch
Set if a Load Data Field command sequence is currently active
Set if command not available in current mode (see
Set if an invalid global address [22:16] is supplied
Set if an invalid margin level setting is supplied
None
None
None
None
0x0E
NOTE
User Margin-0 Level
FCCOB Parameters
Margin level setting
Level Description
Global address [22:16] to identify the Flash
Error Condition
(2)
block
Table
25-30)
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