MK30DX64VLK7R Freescale Semiconductor, MK30DX64VLK7R Datasheet - Page 52

• Manufacturer Part Number: MK30DX64VLK7R
• Description: ARM Microcontrollers - MCU Kinetis 64K Flex
• Manufacturer: Freescale Semiconductor

Specifications of MK30DX64VLK7R

• Rohs: yes
• Core: ARM Cortex M4
• Processor Series: MK30DX64
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 72 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 16 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 1.71 V to 3.6 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: LQFP-80
• Mounting Style: SMD/SMT
• A/d Bit Size: 16 bit
• A/d Channels Available: 2
• Interface Type: CAN, I2C, I2S, SPI, UART, USB
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Timers: 2
• On-chip Dac: Yes
• Program Memory Type: Flash
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 1.71 V

Peripheral operating requirements and behaviors
6.8.3 DSPI switching specifications (full voltage range)
The DMA Serial Peripheral Interface (DSPI) provides a synchronous serial bus with
master and slave operations. Many of the transfer attributes are programmable. The tables
below provides DSPI timing characteristics for classic SPI timing modes. Refer to the
DSPI chapter of the Reference Manual for information on the modified transfer formats
used for communicating with slower peripheral devices.
52
Num
DS1
DS10
DS11
DS12
DS13
DS14
DS15
DS16
Num
DS9
DSPI_SS
DSPI_SCK
(CPOL=0)
DSPI_SOUT
DSPI_SIN
Operating voltage
Frequency of operation
DSPI_SCK output cycle time
Operating voltage
Frequency of operation
DSPI_SCK input cycle time
DSPI_SCK input high/low time
DSPI_SCK to DSPI_SOUT valid
DSPI_SCK to DSPI_SOUT invalid
DSPI_SIN to DSPI_SCK input setup
DSPI_SCK to DSPI_SIN input hold
DSPI_SS active to DSPI_SOUT driven
DSPI_SS inactive to DSPI_SOUT not driven
Table 36. Slave mode DSPI timing (limited voltage range)
Table 37. Master mode DSPI timing (full voltage range)
Figure 20. DSPI classic SPI timing — slave mode
Description
K30 Sub-Family Data Sheet, Rev. 3, 11/2012.
DS13
DS15
Description
Table continues on the next page...
First data
First data
DS14
DS10
DS12
Data
Data
4 x t
1.71
Min.
—
BUS
(t
DS11
SCK
4 x t
Min.
2.7
DS9
—
—
—
/2) − 2
0
2
7
Last data
Last data
BUS
Max.
12.5
3.6
—
Freescale Semiconductor, Inc.
DS16
(t
SCK
Max.
12.5
3.6
10
14
14
—
—
—
—
/2) + 2
MHz
Unit
ns
V
MHz
Unit
Notes
ns
ns
ns
ns
ns
ns
ns
ns
V
1