LPC1112FHN24/2021 NXP Semiconductors, LPC1112FHN24/2021 Datasheet - Page 55

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LPC1112FHN24/2021

Manufacturer Part Number
LPC1112FHN24/2021
Description
ARM Microcontrollers - MCU
Manufacturer
NXP Semiconductors
Datasheet

Specifications of LPC1112FHN24/2021

Rohs
yes
Core
ARM Cortex M0
Processor Series
LPC1112
Data Bus Width
32 bit
Maximum Clock Frequency
50 MHz
Program Memory Size
16 KB
Data Ram Size
2 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.6 V
Package / Case
HVQFN-24
Mounting Style
SMD/SMT
Factory Pack Quantity
2450
NXP Semiconductors
8. Limiting values
Table 12.
In accordance with the Absolute Maximum Rating System (IEC 60134).
[1]
[2]
[3]
[4]
[5]
[6]
[7]
LPC111X
Product data sheet
Symbol
V
V
V
I
I
I
T
T
P
V
DD
SS
latch
stg
j(max)
DD
I
IA
tot(pack)
ESD
The following applies to the limiting values:
a) This product includes circuitry specifically designed for the protection of its internal devices from the damaging effects of excessive
b) Parameters are valid over operating temperature range unless otherwise specified. All voltages are with respect to V
c) The limiting values are stress ratings only. Operating the part at these values is not recommended, and proper operation is not
Maximum/minimum voltage above the maximum operating voltage (see
(< 10 ms) to a device without leading to irrecoverable failure. Failure includes the loss of reliability and shorter lifetime of the device.
See
V
Including voltage on outputs in 3-state mode.
The maximum non-operating storage temperature is different than the temperature for required shelf life which should be determined
based on required shelf lifetime. Please refer to the JEDEC spec (J-STD-033B.1) for further details.
Human body model: equivalent to discharging a 100 pF capacitor through a 1.5 k series resistor.
DD
static charge. Nonetheless, it is suggested that conventional precautions be taken to avoid applying greater than the rated
maximum.
otherwise noted.
guaranteed. The conditions for functional operation are specified in
Table 14
present or not present. Compliant with the I
Limiting values
Parameter
supply voltage (core and external rail)
input voltage
analog input voltage
supply current
ground current
I/O latch-up current
storage temperature
maximum junction temperature
total power dissipation (per package)
electrostatic discharge voltage
for maximum operating voltage.
All information provided in this document is subject to legal disclaimers.
2
C-bus standard. 5.5 V can be applied to this pin when V
Rev. 8 — 20 February 2013
Conditions
5 V tolerant I/O
pins; only valid
when the V
supply voltage is
present
5 V tolerant
open-drain pins
PIO0_4 and
PIO0_5
pin configured as
analog input
per supply pin
per ground pin
(0.5V
(1.5V
T
non-operating
based on package
heat transfer, not
device power
consumption
human body
model; all pins
j
< 125 C
DD
DD
);
) < V
Table
Table
DD
LPC1110/11/12/13/14/15
[1]
I
<
13.
13) and below ground that can be applied for a short time
32-bit ARM Cortex-M0 microcontroller
[5][2]
[2][4]
[2]
[2]
[3]
[6]
[7]
Min
0.5
0.5
0.5
0.5
-
-
-
65
-
-
DD
is powered down.
Max
+4.6
+5.5
+5.5
4.6
100
100
100
+150
150
1.5
+6500
© NXP B.V. 2013. All rights reserved.
SS
unless
Unit
V
V
V
V
mA
C
W
V
mA
mA
C
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