iCE40LP1K-CM36TR Lattice, iCE40LP1K-CM36TR Datasheet - Page 23

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iCE40LP1K-CM36TR

Manufacturer Part Number
iCE40LP1K-CM36TR
Description
FPGA - Field Programmable Gate Array iCE40LP 1280 LUTs, 1.2V Ultra Low-Power
Manufacturer
Lattice
Datasheet

Specifications of iCE40LP1K-CM36TR

Rohs
yes

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Typical Building Block Function Performance – LP Devices
Pin-to-Pin Performance (LVCMOS25)
Register-to-Register Performance
Typical Building Block Function Performance – HX Devices
Pin-to-Pin Performance (LVCMOS25)
Register-to-Register Performance
Basic Functions
16-bit decoder
4:1 MUX
16:1 MUX
Basic Functions
16:1 MUX
16-bit adder
16-bit counter
64-bit counter
Embedded Memory Functions
256x16 Pseudo-Dual Port RAM
1. The above timing numbers are generated using the iCECube2 design tool. Exact performance may vary with
2. Using a V
Basic Functions
16-bit decoder
4:1 MUX
16:1 MUX
Basic Functions
16:1 MUX
16-bit adder
16-bit counter
64-bit counter
Embedded Memory Functions
256x16 Pseudo-Dual Port RAM
1. The above timing numbers are generated using the iCECube2 design tool. Exact performance may vary with
2. Using a V
device and tool version. The tool uses internal parameters that have been characterized but are not tested on
every device.
device and tool version. The tool uses internal parameters that have been characterized but are not tested on
every device.
CC
CC
of 1.14V at Junction Temp 85C.
of 1.14V at Junction Temp 85C.
Function
Function
Function
Function
3-10
DC and Switching Characteristics
iCE40 LP/HX Family Data Sheet
Timing
Timing
Timing
Timing
11.0
12.0
13.0
10.0
190
160
175
240
305
220
255
105
403
9.0
9.5
65
1, 2
1
Units
Units
Units
Units
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns

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