AT25DL081-SSHN-T Adesto Technologies, AT25DL081-SSHN-T Datasheet - Page 23

• Manufacturer Part Number: AT25DL081-SSHN-T
• Description: Flash 8M 1.65-1.95V 100Mhz Serial Flash
• Manufacturer: Adesto Technologies

Specifications of AT25DL081-SSHN-T

• Rohs: yes
• Data Bus Width: 8 bit
• Memory Type: Flash
• Memory Size: 8 Mbit
• Architecture: Flexible, Uniform Erase
• Timing Type: Synchronous
• Interface Type: SPI
• Supply Voltage - Max: 1.95 V
• Supply Voltage - Min: 1.65 V
• Maximum Operating Current: 20 mA
• Operating Temperature: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: SOIC-8

9.3
Protect Sector
Every physical 64KB sector of the device has a corresponding single-bit Sector Protection Register that is used to control
the software protection of a sector. Upon device power-up, each Sector Protection Register will default to the Logical 1
state indicating that all sectors are protected and cannot be programmed or erased.
Issuing the Protect Sector command to a particular sector address will set the corresponding Sector Protection Register
to the Logical 1 state. The following table outlines the two states of the Sector Protection Registers.
Table 9-1.
Before the Protect Sector command can be issued, the Write Enable command must have been previously issued to set
the WEL bit in the Status Register to a Logical 1. To issue the Protect Sector command, the CS pin must first be asserted
and then the opcode 36h must be clocked into the device followed by three address bytes designating any address within
the sector to be protected. Any additional data clocked into the device will be ignored. When the CS pin is deasserted,
the Sector Protection Register corresponding to the physical sector addressed by A23-A0 will be set to the Logical 1
state and the sector itself will then be protected from program and erase operations. In addition, the WEL bit in the Status
Register will be reset back to the Logical 0 state.
The three complete address bytes must be clocked into the device before the CS pin is deasserted, and the CS pin must
be deasserted on an even byte boundary (multiples of eight bits); otherwise, the device will abort the operation. When the
device aborts the Protect Sector operation, the state of the Sector Protection Register will be unchanged, and the WEL
bit in the Status Register will be reset to a Logical 0.
As a safeguard against accidental or erroneous protecting or unprotecting of sectors, the Sector Protection Registers can
themselves be locked from updates by using the SPRL (Sector Protection Registers Locked) bit of the Status Register
(please refer to the Status Register description for more details). If the Sector Protection Registers are locked, then any
attempts to issue the Protect Sector command will be ignored, and the device will reset the WEL bit in the Status
Register back to a Logical 0 and return to the idle state once the CS pin has been deasserted.
Figure 9-3. Protect Sector
SO (SOI)
Value
SI (SIO)
0
1
SCK
CS
Sector Protection Status
Sector is unprotected and can be programmed and erased.
Sector is protected and cannot be programmed or erased (the default state).
Sector Protection Register Values
MSB
High-impedance
0
0
0
1
1
2
Opcode
1
3
0
4
1
5
1
6
0
7
MSB
A
8
A
9
A
10 11
A
Address Bits A23-A0
A
12
A
A
26
A
27 28
A
A
29 30
A
A
31
AT25DL081 [DATASHEET]
8732E–DFLASH–1/2013
23