C8051F986-GUR Silicon Labs, C8051F986-GUR Datasheet - Page 161

• Manufacturer Part Number: C8051F986-GUR
• Description: 8-bit Microcontrollers - MCU 8kB 512B RAM 12b ADC
• Manufacturer: Silicon Labs

Specifications of C8051F986-GUR

• Rohs: yes
• Core: 8051
• Processor Series: C8051
• Data Bus Width: 8 bit

15. Power Management
C8051F99x-C8051F98x devices support 5 power modes: Normal, Idle, Stop, Suspend, and Sleep. The
power management unit (PMU0) allows the device to enter and wake-up from the available power modes.
A brief description of each power mode is provided in Table 15.1. Detailed descriptions of each mode can
be found in the following sections.
In battery powered systems, the system should spend as much time as possible in sleep mode in order to
preserve battery life. When a task with a fixed number of clock cycles needs to be performed, the device
should switch to normal mode, finish the task as quickly as possible, and return to sleep mode. Idle mode
and suspend modes provide a very fast wake-up time; however, the power savings in these modes will not
be as much as in sleep mode. Stop mode is included for legacy reasons; the system will be more power
efficient and easier to wake up when idle, suspend, or sleep mode are used.
Although switching power modes is an integral part of power management, enabling/disabling individual
peripherals as needed will help lower power consumption in all power modes. Each analog peripheral can
be disabled when not in use or placed in a low power mode. Digital peripherals such as timers or serial
busses draw little power whenever they are not in use. Digital peripherals draw no power in sleep mode.
Power Mode
Suspend
Normal
Sleep
Stop
Idle
Device fully functional
All peripherals fully functional.
Very easy to wake up.
Legacy 8051 low power mode.
A reset is required to wake up.
Similar to Stop Mode, but very fast
wake-up time and code resumes
execution at the next instruction.
Ultra Low Power and flexible
wake-up sources. Code resumes
execution at the next instruction.
Comparator0 only functional in
two-cell mode.
Description
Table 15.1. Power Modes
Rev. 1.1
SmaRTClock,
SmaRTClock,
Comparator0,
Comparator0,
Any Interrupt
Port Match,
Port Match,
Any Reset
Wake-Up
Sources
RST pin
RST pin
C8051F99x-C8051F98x
CS0,
N/A
All Internal Oscillators Disabled
All Oscillators except SmaRT-
Precision Oscillator Disabled
Power Supply Gated
System Clock Gated
Excellent MIPS/mW
No Code Execution
No Code Execution
No Code Execution
Power Savings
Clock Disabled
Very Good
Excellent
Good
Good
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