C8051F986-GUR Silicon Labs, C8051F986-GUR Datasheet - Page 308

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C8051F986-GUR

Manufacturer Part Number
C8051F986-GUR
Description
8-bit Microcontrollers - MCU 8kB 512B RAM 12b ADC
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F986-GUR

Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
C8051F99x-C8051F98x
26.3.6. 16-Bit Pulse Width Modulator Mode
A PCA module may also be operated in 16-Bit PWM mode. 16-bit PWM mode is independent of the other
(8/9/10/11-bit) PWM modes. In this mode, the 16-bit capture/compare module defines the number of PCA
clocks for the low time of the PWM signal. When the PCA counter matches the module contents, the
output on CEXn is asserted high; when the 16-bit counter overflows, CEXn is asserted low. To output a
varying duty cycle, new value writes should be synchronized with PCA CCFn match interrupts. 16-Bit
PWM Mode is enabled by setting the ECOMn, PWMn, and PWM16n bits in the PCA0CPMn register. For a
varying duty cycle, match interrupts should be enabled (ECCFn = 1 AND MATn = 1) to help synchronize
the capture/compare register writes. If the MATn bit is set to 1, the CCFn flag for the module will be set
each time a 16-bit comparator match (rising edge) occurs. The CF flag in PCA0CN can be used to detect
the overflow (falling edge). The duty cycle for 16-Bit PWM Mode is given by Equation 26.4.
Important Note About Capture/Compare Registers: When writing a 16-bit value to the PCA0
Capture/Compare registers, the low byte should always be written first. Writing to PCA0CPLn clears the
ECOMn bit to 0; writing to PCA0CPHn sets ECOMn to 1.
Using Equation 26.4, the largest duty cycle is 100% (PCA0CPn = 0), and the smallest duty cycle is
0.0015% (PCA0CPn = 0xFFFF). A 0% duty cycle may be generated by clearing the ECOMn bit to 0.
308
PCA0CPLn
Write to
Reset
PCA0CPHn
Write to
0
ENB
ENB
1
W
M
P
1
6
n
1
O
M
E
C
n
PCA0CPMn
C
A
P
P
n
0 0 x 0
C
A
P
N
n
M
A
T
n
PCA Timebase
O
G
T
n
W
M
P
n
E
C
C
F
n
x
Equation 26.4. 16-Bit PWM Duty Cycle
Figure 26.10. PCA 16-Bit PWM Mode
Duty Cycle
Enable
PCA0CPHn
PCA0H
=
16-bit Comparator
Rev. 1.1
---------------------------------------------------- -
65536 PCA0CPn
PCA0CPLn
PCA0L
65536
Overflow
match
S
R
SET
CLR
Q
Q
CEXn
Crossbar
Port I/O

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