C8051F997-GUR Silicon Labs, C8051F997-GUR Datasheet - Page 124
C8051F997-GUR
Manufacturer Part Number
C8051F997-GUR
Description
8-bit Microcontrollers - MCU 8kB 14-CH CDC
Manufacturer
Silicon Labs
Datasheet
1.C8051F986-GUR.pdf
(322 pages)
Specifications of C8051F997-GUR
Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
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C8051F99x-C8051F98x
9.4.
Following are descriptions of SFRs related to the operation of the CIP-51 System Controller. Reserved bits
should not be set to logic l. Future product versions may use these bits to implement new features in which
case the reset value of the bit will be logic 0, selecting the feature's default state. Detailed descriptions of
the remaining SFRs are included in the sections of the data sheet associated with their corresponding
system function.
SFR Definition 9.1. DPL: Data Pointer Low Byte
SFR Page = All; SFR Address = 0x82
SFR Definition 9.2. DPH: Data Pointer High Byte
SFR Page = All; SFR Address = 0x83
124
Name
Reset
Name
Reset
Bit
7:0
Bit
7:0
Type
Type
Bit
Bit
DPH[7:0]
CIP-51 Register Descriptions
DPL[7:0]
Name
Name
7
0
7
0
Data Pointer Low.
The DPL register is the low byte of the 16-bit DPTR. DPTR is used to access indi-
rectly addressed Flash memory or XRAM.
Data Pointer High.
The DPH register is the high byte of the 16-bit DPTR. DPTR is used to access indi-
rectly addressed Flash memory or XRAM.
6
0
6
0
5
0
5
0
Rev. 1.1
4
0
4
0
DPH[7:0]
DPL[7:0]
R/W
R/W
Function
Function
3
0
3
0
2
0
2
0
1
0
1
0
0
0
0
0
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