C8051F996-GUR Silicon Labs, C8051F996-GUR Datasheet - Page 67
C8051F996-GUR
Manufacturer Part Number
C8051F996-GUR
Description
8-bit Microcontrollers - MCU 8kB ADC 14-CH CDC
Manufacturer
Silicon Labs
Datasheet
1.C8051F986-GUR.pdf
(322 pages)
Specifications of C8051F996-GUR
Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
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5.2.2. Tracking Modes
Each ADC0 conversion must be preceded by a minimum tracking time in order for the converted result to
be accurate. The minimum tracking time is given in Table 4.10. The AD0TM bit in register ADC0CN
controls the ADC0 track-and-hold mode. In its default state when Burst Mode is disabled, the ADC0 input
is continuously tracked, except when a conversion is in progress. When the AD0TM bit is logic 1, ADC0
operates in low-power track-and-hold mode. In this mode, each conversion is preceded by a tracking
period of 3 SAR clocks (after the start-of-conversion signal). When the CNVSTR signal is used to initiate
conversions in low-power tracking mode, ADC0 tracks only when CNVSTR is low; conversion begins on
the rising edge of CNVSTR (see Figure 5.2). Tracking can also be disabled (shutdown) when the device is
in low power standby or sleep modes. Low-power track-and-hold mode is also useful when AMUX settings
are frequently changed, due to the settling time requirements described in “5.2.4. Settling Time
Requirements” on page 69.
(AD0CM[2:0]=000, 001,010
Timer 1, Timer 3 Overflow
Figure 5.2. 10-Bit ADC Track and Conversion Example Timing (BURSTEN = 0)
Write '1' to AD0BUSY,
(AD0CM[2:0]=100)
Timer 0, Timer 2,
SAR Clocks
AD0TM=1
AD0TM=0
011, 101)
AD0TM=1
AD0TM=0
CNVSTR
Clocks
Clocks
SAR
SAR
Low Power
or Convert
Low Power
or Convert
Track or
A. ADC0 Timing for External Trigger Source
Convert
Track or Convert
B. ADC0 Timing for Internal Trigger Source
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17
1 2 3 4 5 6 7 8 9 10 11 12 13 14
Track
Track
Rev. 1.1
1 2 3 4 5 6 7 8 9
Convert
C8051F99x-C8051F98x
Convert
Convert
Convert
10 11 12 13 14
Low Power Mode
Track
Low Power
Mode
Track
67
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