XRT83SL314ES Exar, XRT83SL314ES Datasheet - Page 69

• Manufacturer Part Number: XRT83SL314ES
• Description: LIN Transceivers 14 CHT1/E1 LIUSH
• Manufacturer: Exar

Specifications of XRT83SL314ES

• Product Category: LIN Transceivers
• Rohs: yes

xr
14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
B
B
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
IT
IT
MclkT1out1
MclkT1out0
MclkE1out1
MclkE1out0
LCV/OFLW Line Code Violation / Counter Overflow Monitor Select
CNTRDEN Line Code Violation Counter Read Enable
Reserved
Reserved
Reserved
Reserved
Reserved
N
N
AME
AME
T
T
ABLE
ABLE
MCLKT1OUT Select
MclkT1out[1:0] is used to program the MCLKT1out pin. By default,
the output clock is 1.544MHz.
00 = 1.544MHz
01 = 3.088MHz
10 = 6.176MHz
11 = 12.352MHz
MCLKE1OUT Select
MclkE1out[1:0] is used to program the MCLKE1out pin.
default, the output clock is 2.048MHz.
00 = 2.048MHz
01 = 4.096MHz
10 = 8.192MHz
11 = 16.384MHz
This Register Bit is Not Used
This Register Bit is Not Used
This Register Bit is Not Used
This Register Bit is Not Used
This bit is used to select the monitoring activity between the LCV
and the counter overflow status. When the 16-bit LCV counter sat-
urates, the counter overflow condition is activated. By default, the
LCV activity is monitored by bit D4 in register 0x05h.
0 = Monitoring LCV
1 = Monitoring the counter overflow status
This bit enables the 16-bit LCV counter contents to be read from
bits D[7:0] in register 0xE8h. If a counter reaches full scale, it sat-
urates and remains at FFFFh until a reset is initiated in register
0xE6h. By default, the LCV counter readback function is disabled.
0 = Disabled
1 = Enables the 16-bit LCV Counters for Readback
This Register Bit is Not Used
45: M
46: M
ICROPROCESSOR
ICROPROCESSOR
G
G
LOBAL
LOBAL
R
F
R
F
UNCTION
UNCTION
EGISTER
EGISTER
R
R
66
EGISTER
EGISTER
(0
(0
X
X
E4
E5
0
0
X
X
H
H
E4
E5
)
)
H
H
B
B
IT
IT
D
D
ESCRIPTION
ESCRIPTION
By
Register
Register
Type
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
XRT83SL314
(HW reset)
(HW reset)
REV. 1.0.1
Default
Default
Value
Value
0
0
0
0
0
0
0
0
0
0
0