XRT83L314ES Exar, XRT83L314ES Datasheet - Page 69

• Manufacturer Part Number: XRT83L314ES
• Description: LIN Transceivers
• Manufacturer: Exar

Specifications of XRT83L314ES

• Product Category: LIN Transceivers
• Rohs: yes

B
B
B
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
IT
IT
IT
EQFLAG5
EQFLAG4
EQFLAG3
EQFLAG2
EQFLAG1
EQFLAG0
RxTCNTL
Reserved
Reserved
Reserved
Reserved
Reserved
EXLOS
N
N
N
ICT
AME
AME
AME
T
T
ABLE
ABLE
Extended Loss of Zeros
The number of zeros required to declare a Digital Loss of Signal is
extended to 4,096.
0 = Normal Operation
1 = Enables the EXLOS function
In Circuit Testing
0 = Normal Operation
1 = Sets all output pins to "High" impedance for in circuit testing
This Register Bit is Not Used
Receive Termination Select Control
This bit sets the LIU to control the RxTSEL function with either the
individual channel register bit or the global hardware pin.
0 = Control of the receive termination is set to the register bits
1 = Control of the receive termination is set to the hardware pin
Equalizer Attenuation Flag
EQFLAG[5:0] is used to generate an interrupt condition for an
RLOS other than the default setting described in the datasheet. A
desired value can be programmed into this register. If EQFLAGE
is enabled in register 0x04h and if this 6-Bit binary word is equal to
the 6-Bit cable loss indicator, an interrupt will be generated.
This Register Bit is Not Used
This Register Bit is Not Used
This Register Bit is Not Used
This Register Bit is Not Used
43: M
44: M
14-CHANNEL T1/E1/J1 LONG-HAUL/SHORT-HAUL LINE INTERFACE UNIT
ICROPROCESSOR
ICROPROCESSOR
G
G
G
LOBAL
LOBAL
LOBAL
R
F
R
F
R
F
UNCTION
UNCTION
UNCTION
EGISTER
EGISTER
EGISTER
R
R
65
EGISTER
EGISTER
(0
(0
(0
X
X
X
E1
E2
E3
0
0
X
X
H
H
H
E2
E3
)
)
)
H
H
B
B
IT
IT
D
D
ESCRIPTION
ESCRIPTION
Register
Register
Register
Type
Type
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
XRT83L314
(HW reset)
(HW reset)
(HW reset)
Default
Default
Default
REV. 1.0.0
Value
Value
Value
0
0
0
0
0
0
0
0
0
0
0
0
0
0