XRT83VSH314ES Exar, XRT83VSH314ES Datasheet - Page 69
XRT83VSH314ES
Manufacturer Part Number
XRT83VSH314ES
Description
Peripheral Drivers & Components - PCIs 14 CHT1/E1LIUSH LOW COST VERSION
Manufacturer
Exar
Datasheet
1.XRT83VSH314ES.pdf
(80 pages)
Specifications of XRT83VSH314ES
Product Category
Peripheral Drivers & Components - PCIs
Rohs
yes
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REV. 1.0.1
n
D[7:0]
B
B
D2
D1
D0
IT
IT
chUPDATE LCV Counter Update Per Channel
Reserved
BYTEsel
ChRST
N
N
AME
AME
T
T
ABLE
LCV Counter Byte Select
This bit is used to select the MSB or LSB for Reading the contents
of the LCV counter for a given channel. The channel is addressed
by using bits D[3:0] in register 0xE5h. By default, the LSB byte is
selected.
0 = Low Byte
1 = High Byte
This bit is used to latch the contents of the counter for a given
channel into a holding register so that the value of the counter can
be read. The channel is addressed by using bits D[3:0] in register
0xE5h.
0 = Normal Operation
1 = Updates the Selected Channel
LCV Counter Reset Per Channel
This bit is used to reset the LCV counter of a given channel to its
default state 0000h. The channel is addressed by using bits D[3:0]
in register 0xE5h. This bit must be set to "1" for 1 µ S.
0 = Normal Operation
1 = Resets the Selected Channel
These Register Bits are Not Used
ABLE
46: M
47: M
ICROPROCESSOR
ICROPROCESSOR
G
G
14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
LOBAL
LOBAL
R
F
R
F
UNCTION
UNCTION
EGISTER
EGISTER
R
R
66
EGISTER
EGISTER
(0
(0
X
X
E6
E7
0
0
X
X
H
H
E6
E7
)
)
H
H
B
B
IT
IT
D
D
ESCRIPTION
ESCRIPTIO
Register
Register
XRT83VSH314
Type
Type
R/W
R/W
R/W
R/W
(HW reset)
(HW reset)
Default
Default
Value
Value
0
0
0
0
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