74AUP1Z04GW-G NXP Semiconductors, 74AUP1Z04GW-G Datasheet

74AUP1Z04GW-G

Manufacturer Part Number

74AUP1Z04GW-G

Description

Buffers & Line Drivers 1.8V LOW-POW X-TAL DRVR ENABLE

Manufacturer

NXP Semiconductors

Datasheet

1.74AUP1Z04GW-G.pdf (28 pages)

Specifications of 74AUP1Z04GW-G

Product Category

Buffers & Line Drivers

Rohs

yes

Mounting Style

SMD/SMT

Package / Case

SOT-363

Factory Pack Quantity

3000

Part # Aliases

74AUP1Z04GW,125

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1. General description

2. Features and benefits

The 74AUP1Z04 combines the functions of the 74AUP1GU04 and 74AUP1G04 with

enable circuitry and an internal bias resistor to provide a device optimized for use in

crystal oscillator applications.

When not in use the EN input can be driven HIGH, putting the device in a low power

disable mode with X1 pulled HIGH via R

action at the EN input makes the circuit tolerant to slower input rise and fall times across

the entire V

This device is fully specified for partial power-down applications using I

The I

the device when it is powered down.

The integration of the two devices into the 74AUP1Z04 produces the benefits of a

compact footprint, lower power dissipation and stable operation over a wide range of

frequency and temperature.



74AUP1Z04

Low-power X-tal driver with enable and internal resistor

Rev. 5 — 9 August 2012

Wide supply voltage range from 0.8 V to 3.6 V

High noise immunity

ESD protection:

Latch-up performance exceeds 100 mA per JESD78B Class II

Inputs accept voltages up to 3.6 V

Low noise overshoot and undershoot < 10 % of V

Multiple package options

Specified from 40 C to +85 C and 40 C to +125 C



OFF

HBM JESD22-A114F Class 3A exceeds 5000 V

MM JESD22-A115-A exceeds 200 V

CDM JESD22-C101E exceeds 1000 V

circuitry provides partial Power-down mode operation at output Y

circuitry disables the output Y, preventing the damaging backflow current through

range from 0.8 V to 3.6 V.

, X2 set LOW and Y set HIGH.Schmitt trigger

Product data sheet

OFF

at output Y.

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