UBA2017P/1,112 NXP Semiconductors, UBA2017P/1,112 Datasheet - Page 9
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UBA2017P/1,112
Manufacturer Part Number
UBA2017P/1,112
Description
Display Drivers & Controllers SMPS CTRLR 12.4V
Manufacturer
NXP Semiconductors
Datasheet
1.UBA2017AP1112.pdf
(29 pages)
Specifications of UBA2017P/1,112
Rohs
yes
Operating Supply Voltage
12.4 V
Mounting Style
Through Hole
Package / Case
DIP-16
Maximum Output Current
105 mA
Product
Fluorescent Lamp Driver
Factory Pack Quantity
25
Supply Current
2.2 mA
NXP Semiconductors
UBA2017
Product data sheet
7.3.1 Reset
7.3.2 Standby
7.3.3 Oscillating states (Preheat, Ignition and Burn)
7.3.4 Preheat
When voltage on pin VDD is below the reset voltage V
driver are LOW. All internal latches are reset. When voltage on pin VDD rises above
V
In the STANDBY state, the low-side gate driver is on (GLHB is HIGH). The floating supply
capacitor C
Preheat state is entered.
The highest and lowest oscillation frequency can be set with capacitor C
the CF pin. The oscillator is implemented in such a way that the lowest frequency f
the most accurate. In any oscillating state (Preheat, Ignition or Burn), when VDD voltage
drops below V
when GLHB is HIGH and enters the STANDBY state.
The oscillating frequency starts at f
point A) and remains at that frequency until the voltages at pins CPT and VFB settle
above their pin short protection levels (V
half-bridge current or frequency is regulated when in the preheat state; see
“Resonance curve application”
Pin CIFB supplies a current I
this pin and its voltage rises. This causes the switching frequency to decrease (pin CIFB is
the input for the voltage controlled oscillator). This causes an increase in half-bridge
current (assuming the switching frequency is higher than the load resonance frequency).
This current is measured via pin SLHB using a resistor connected between the source of
the low-side switch and ground. When the voltage on pin SLHB rises above the preheat
current control voltage V
to pin CIFB and the frequency is increased. When the voltage drops below V
current I
rst(VDD)
, the IC enters the STANDBY state.
ch(CIFB)
FSHB
stop(VDD)
All information provided in this document is subject to legal disclaimers.
from pin CIFB causes the frequency to decrease.
is then charged. When the VDD voltage rises above V
or overtemperature is detected, the half-bridge stops oscillation
Rev. 2 — 15 May 2012
crtl(ph)SLHB
600 V fluorescent lamp driver with linear dimming function
ch(CIFB)
point B.
, discharge current I
sw(high)
to the externally connected compensation network on
VFB
(see
>
UBA2017/UBA2017A
V
Figure 7 “Resonance curve application”
th(osp)(VFB)
rst(VDD)
dch(CIFB)
and V
, both gates of the half-bridge
replaces the charge current
CPT
>
V
startup(VDD)
© NXP B.V. 2012. All rights reserved.
th(scp)(CPT)
CF
connected to
Figure 7
th(ocp)SLHB
, the
sw(low)
). The
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