MCIMX6S5EVM10AB Freescale Semiconductor, MCIMX6S5EVM10AB Datasheet - Page 89

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MCIMX6S5EVM10AB

Manufacturer Part Number
MCIMX6S5EVM10AB
Description
Processors - Application Specialized i.MX6 Solo rev 1.1
Manufacturer
Freescale Semiconductor
Type
Multimedia Applicationsr
Datasheet

Specifications of MCIMX6S5EVM10AB

Rohs
yes
Core
ARM Cortex A9
Processor Series
i.MX6
Data Bus Width
32 bit
Maximum Clock Frequency
1 GHz
Data Ram Size
16 KB
Operating Supply Voltage
1.175 V to 1.5 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Package / Case
MAPBGA-624
Interface Type
I2C, I2S, UART, USB
Memory Type
L1/L2 Cache, ROM, SRAM
Minimum Operating Temperature
- 20 C
Number Of Timers
2

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Figure 49
figure.
4.11.5.3 RGMII Signal Switching Specifications
The following timing specifications meet the requirements for RGMII interfaces for a range of transceiver
devices.
Freescale Semiconductor
M16
M17
M18
M19
M20
M21
ENET0_TXD[1:0] (output)
ENET_TX_EN
ENET0_RXD[1:0]
ID
ENET_RX_ER
ENET_CLK (input)
ENET_CLK pulse width high
ENET_CLK pulse width low
ENET_CLK to ENET0_TXD[1:0], ENET_TX_EN invalid
ENET_CLK to ENET0_TXD[1:0], ENET_TX_EN valid
ENET0_RXD[1:0], CRS_DV(ENET_RX_EN), ENET_RX_ER to
ENET_CLK setup
ENET_CLK to ENET0_RXD[1:0], ENET_RX_EN, ENET_RX_ER hold
shows RMII mode timings.
CRS_DV (input)
Symbol
T
T
skewT
cyc
2
3
i.MX 6Solo/6DualLite Applications Processors for Consumer Products, Rev. 1
Clock cycle duration
Data to clock output skew at transmitter
Table 61. RGMII Signal Switching Specifications
Figure 49. RMII Mode Signal Timing Diagram
Characteristic
Table 60
Table 60. RMII Signal Timing
Description
M20
M18
describes the timing parameters (M16–M21) shown in the
M21
M19
M16
Min.
-100
7.2
M17
Min.
35%
35%
4
4
2
1
Max.
900
8.8
Max.
65%
65%
Electrical Characteristics
15
ENET_CLK period
ENET_CLK period
Unit
ns
ps
Unit
ns
ns
ns
ns
89

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