MCIMX6U5DVM10AB Freescale Semiconductor, MCIMX6U5DVM10AB Datasheet - Page 98

• Manufacturer Part Number: MCIMX6U5DVM10AB
• Description: Processors - Application Specialized i.MX6 DualLite
• Manufacturer: Freescale Semiconductor
• Type: Multimedia Applicationsr

Specifications of MCIMX6U5DVM10AB

• Rohs: yes
• Core: ARM Cortex A9
• Processor Series: i.MX6
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 1 GHz
• Data Ram Size: 256 kB
• Operating Supply Voltage: 1.175 V to 1.5 V
• Mounting Style: SMD/SMT
• Package / Case: FCBGA-624
• Interface Type: I2C, I2S, SDIO, UART, USB
• Memory Type: L1/L2 Cache, ROM, SRAM

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Electrical Characteristics
4.11.10.1 IPU Sensor Interface Signal Mapping
The IPU supports a number of sensor input formats.
Pins used for various supported interface formats.
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CSIx_DAT0
CSIx_DAT1
CSIx_DAT2
CSIx_DAT3
CSIx_DAT4
CSIx_DAT5
CSIx_DAT6
CSIx_DAT7
CSIx_DAT8
CSIx_DAT9
CSIx_DAT10
CSIx_DAT11
CSIx_DAT12
CSIx_DAT13
CSIx_DAT14
CSIx_DAT15
CSIx_DAT16
CSIx_DAT17
CSIx_DAT18
CSIx_DAT19
CSIx stands for CSI1 or CSI2
The MSB bits are duplicated on LSB bits implementing color extension
The two MSB bits are duplicated on LSB bits implementing color extension
YCbCr, 8 bits—Supported within the BT.656 protocol (sync embedded within the data stream).
RGB 16 bits— Supported in two ways: (1) As a “generic data” input, with no on-the-fly processing; (2) With on-the-fly
processing, but only under some restrictions on the control protocol.
YCbCr 16 bits— Supported as a “generic-data” input, with no on-the-fly processing.
YCbCr 16 bits— Supported as a sub-case of the YCbCr, 20 bits, under the same conditions (BT.1120 protocol).
YCbCr, 20 bits, supported only within the BT.1120 protocol (syncs embedded within the data stream).
Name
Signal
1
G[0], R[2]
G[1], R[3]
G[2], R[4]
B[0], G[3]
B[1], G[4]
B[2], G[5]
B[3], R[0]
B[4], R[1]
RGB565
2 cycles
8 bits
Table 65. Camera Input Signal Cross Reference, Format, and Bits Per Cycle
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—
—
—
—
—
—
—
—
—
—
—
i.MX 6Solo/6DualLite Applications Processors for Consumer Products, Rev. 1
R[2],G[4],B[2]
R[3],G[5],B[3]
R[4],G[0],B[4]
R[0],G[1],B[0]
R[1],G[2],B[1]
R[2],G[3],B[2]
R[3],G[4],B[3]
R[4],G[5],B[4]
RGB565
3 cycles
8 bits
—
—
—
—
—
—
—
—
—
—
—
—
2
RGB666
3 cycles
R/G/B[4]
R/G/B[5]
R/G/B[0]
R/G/B[1]
R/G/B[2]
R/G/B[3]
R/G/B[4]
R/G/B[5]
8 bits
—
—
—
—
—
—
—
—
—
—
—
—
3
RGB888
3 cycles
R/G/B[0]
R/G/B[1]
R/G/B[2]
R/G/B[3]
R/G/B[4]
R/G/B[5]
R/G/B[6]
R/G/B[7]
8 bits
—
—
—
—
—
—
—
—
—
—
—
—
Table 65
2 cycles
YCbCr
Y/C[0]
Y/C[1]
Y/C[2]
Y/C[3]
Y/C[4]
Y/C[5]
Y/C[6]
Y/C[7]
8 bits
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—
—
—
—
—
—
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defines the mapping of the Sensor Interface
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RGB565
2 cycles
16 bits
G[0]
G[1]
G[2]
G[3]
G[4]
G[5]
B[0]
B[1]
B[2]
B[3]
B[4]
R[0]
R[1]
R[2]
R[3]
R[4]
—
—
—
—
5
YCbCr
1 cycle
16 bits
C[0]
C[1]
C[2]
C[3]
C[4]
C[5]
C[6]
C[7]
Y[0]
Y[1]
Y[2]
Y[3]
Y[4]
Y[5]
Y[6]
Y[7]
—
—
—
—
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Freescale Semiconductor
YCbCr
1 cycle
16 bits
C[0]
C[1]
C[2]
C[3]
C[4]
C[5]
C[6]
C[7]
Y[0]
Y[1]
Y[2]
Y[3]
Y[4]
Y[5]
Y[6]
Y[7]
0
0
0
0
7
YCbCr
1 cycle
20 bits
C[0]
C[1]
C[2]
C[3]
C[4]
C[5]
C[6]
C[7]
C[8]
C[9]
Y[0]
Y[1]
Y[2]
Y[3]
Y[4]
Y[5]
Y[6]
Y[7]
Y[8]
Y[9]
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