MCIMX6Q7CVT08AC Freescale Semiconductor, MCIMX6Q7CVT08AC Datasheet - Page 59

• Manufacturer Part Number: MCIMX6Q7CVT08AC
• Description: Processors - Application Specialized i.MX6Q
• Manufacturer: Freescale Semiconductor
• Type: Multimedia Applicationsr

Specifications of MCIMX6Q7CVT08AC

• Rohs: yes
• Core: ARM Cortex A9
• Processor Series: i.MX6
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 800 MHz
• Data Ram Size: 16 KB
• Maximum Operating Temperature: + 105
• Mounting Style: SMD/SMT
• Package / Case: FCBGA
• Interface Type: I2C, I2S, UART, USB
• Memory Type: L1/L2 Cache, ROM, SRAM
• Minimum Operating Temperature: - 40 C
• Number Of Timers: 2

1
2
Figure 23
in
Freescale Semiconductor
DDR17 DRAM_DATAxx and DRAM_DQMx setup time to DRAM_SDQSx_P (differential
DDR18 DRAM_DATAxx and DRAM_DQMx hold time to DRAM_SDQSx_P (differential
DDR21 DRAM_SDQSx_P latching rising transitions to associated clock edges
DDR4
DDR5
DDR6
DDR7
All measurements are in reference to Vref level.
Measurements were done using balanced load and 25  resistor from outputs to DRAM_VREF.
Table
ID
ID
DRAM_SDCLKx_P
DRAM_SDCLKx_N
DRAM_SDQSx_P (output)
DRAM_DATAxx (output)
DRAM_DQMx (output)
strobe)
strobe)
40.
DRAM_CSx_B, DRAM_RAS_B,
DRAM_CAS_B, DRAM_SDCKEx,
DRAM_SDWE_B, DRAM_ODTx setup time
DRAM_CSx_B, DRAM_RAS_B,
DRAM_CAS_B, DRAM_SDCKEx,
DRAM_SDWE_B, DRAM_ODTx hold time
Address output setup time
Address output hold time
shows the DDR3/DDR3L write timing diagram. The timing parameters for this diagram appear
i.MX 6Dual/6Quad Applications Processors for Industrial Products, Rev. 2
Table 39. DDR3/DDR3L Timing Parameter Table (continued)
Parameter
DDR17
DDR21
DDR17
Figure 23. DDR3/DDR3L Write Cycle
Table 40. DDR3/DDR3L Write Cycle
Parameter
Data
DM
DDR18
DDR18
Data
DM
Symbol
DDR17
t
t
t
t
DDR17
IH
IH
IS
IS
Data
DM
DDR22
Data
DM
DDR23
Min
500
400
500
400
DDR18
DDR18
CK = 532 MHz
Data
DM
Symbol
Data
t
DM
DQSS
t
t
DH
DS
Max
Electrical Characteristics
—
—
—
—
CK = 532 MHz
Data
DM
-0.25
Min
240
240
+0.25
Max
Data
DM
—
—
Unit
ps
ps
ps
ps
Unit
tCK
ps
ps
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