IS61WV12816EDBLL-10TLI ISSI, IS61WV12816EDBLL-10TLI Datasheet - Page 9

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IS61WV12816EDBLL-10TLI

Manufacturer Part Number
IS61WV12816EDBLL-10TLI
Description
SRAM 2Mb (128K x 16) 10ns 2.4V-3.6V
Manufacturer
ISSI
Datasheet

Specifications of IS61WV12816EDBLL-10TLI

Rohs
yes
Memory Size
2 Mbit
Organization
128 Kbit x 16
Access Time
10 ns
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2.4 V
Maximum Operating Current
35 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Package / Case
TSOP-44
Memory Type
Asynchronous CMOS
Factory Pack Quantity
135
IS61/64WV12816EDBLL
AC WAVEfORMS
WRITE CYCLE NO. 1
WRITE CYCLE NO. 2
Integrated Silicon Solution, Inc. — www.issi.com
Rev. A
09/29/2011
Notes:
1. WRITE is an internally generated signal asserted during an overlap of the LOW states on the CE and WE inputs and at least
2. WRITE = (CE)
one of the LB and UB inputs being in the LOW state.
ADDRESS
ADDRESS
[
(LB) = (UB)
UB, LB
UB, LB
D
D
OUT
WE
OUT
D
WE
CE
D
OE
CE
IN
IN
(CE Controlled, OE is HIGH or LOW)
(WE Controlled. OE is HIGH During Write Cycle)
LOW
]
(WE).
t
SA
DATA UNDEFINED
DATA UNDEFINED
t
SA
VALID ADDRESS
t
t
t
HZWE
AW
HZWE
t
VALID ADDRESS
AW
t
t
t
t
PWE1
PWE2
PWE1
WC
t
t
SCE
t
WC
t
PWB
PWB
(1 )
HIGH-Z
HIGH-Z
t
t
SD
DATA
SD
DATA
IN
IN
VALID
(1,2)
VALID
t
t
HD
t
HD
t
LZWE
LZWE
t
t
HA
HA
UB_CEWR1.eps
UB_CEWR2.eps
9
1
2
3
4
5
6
7
8
9
10
11
12

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