C8051F302-GSR Silicon Labs, C8051F302-GSR Datasheet - Page 89
![no-image](/images/no-image-200.jpg)
C8051F302-GSR
Manufacturer Part Number
C8051F302-GSR
Description
8-bit Microcontrollers - MCU 8KB 8ADC 14Pin MCU
Manufacturer
Silicon Labs
Datasheet
1.C8051F301-GSR.pdf
(178 pages)
Specifications of C8051F302-GSR
Rohs
yes
Core
8051
Data Bus Width
8 bit
Processor Series
C8051
- Current page: 89 of 178
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10. Flash Memory
On-chip, reprogrammable Flash memory is included for program code and non-volatile data storage. The
Flash memory can be programmed in-system, a single byte at a time, through the C2 interface or by soft-
ware using the MOVX instruction. Once cleared to logic 0, a Flash bit must be erased to set it back to logic
1. Flash bytes would typically be erased (set to 0xFF) before being reprogrammed. The write and erase
operations are automatically timed by hardware for proper execution; data polling to determine the end of
the write/erase operation is not required. Code execution is stalled during a Flash write/erase operation.
Refer to Table 10.1 for complete Flash memory electrical characteristics.
10.1. Programming The Flash Memory
The simplest means of programming the Flash memory is through the C2 interface using programming
tools provided by Silicon Labs or a third party vendor. This is the only means for programming a non-initial-
ized device. For details on the C2 commands to program Flash memory, see
on page
To ensure the integrity of Flash contents, it is strongly recommended that the on-chip V
be enabled in any system that includes code that writes and/or erases Flash memory from soft-
ware.
10.1.1. Flash Lock and Key Functions
Flash writes and erases by user software are protected with a lock and key function; Flash reads by user
software are unrestricted. The Flash Lock and Key Register (FLKEY) must be written with the correct key
codes, in sequence, before Flash operations may be performed. The key codes are: 0xA5, 0xF1. The tim-
ing does not matter, but the codes must be written in order. If the key codes are written out of order, or the
wrong codes are written, Flash writes and erases will be disabled until the next system reset. Flash writes
and erases will also be disabled if a Flash write or erase is attempted before the key codes have been writ-
ten properly. The Flash lock resets after each write or erase; the key codes must be written again before a
following Flash operation can be performed. The FLKEY register is detailed in SFR Definition 10.2.
10.1.2. Flash Erase Procedure
The Flash memory can be programmed by software using the MOVX instruction with the address and data
byte to be programmed provided as normal operands. Before writing to Flash memory using MOVX, Flash
write operations must be enabled by: (1) setting the PSWE Program Store Write Enable bit (PSCTL.0) to
logic 1 (this directs the MOVX writes to target Flash memory); and (2) Writing the Flash key codes in
sequence to the Flash Lock register (FLKEY). The PSWE bit remains set until cleared by software.
A write to Flash memory can clear bits but cannot set them; only an erase operation can set bits in Flash.
A byte location to be programmed should be erased before a new value is written. The 8k byte Flash
memory is organized in 512-byte pages. The erase operation applies to an entire page (setting all bytes in
the page to 0xFF). To erase an entire 512-byte page, perform the following steps:
Step 1. Disable interrupts (recommended).
Step 2. Set the Program Store Erase Enable bit (PSEE in the PSCTL register).
Step 3. Set the Program Store Write Enable bit (PSWE in the PSCTL register).
Step 4. Write the first key code to FLKEY: 0xA5.
Step 5. Write the second key code to FLKEY: 0xF1.
Step 6. Using the MOVX instruction, write a data byte to any location within the 512-byte page to
173.
be erased.
Rev. 2.9
C8051F300/1/2/3/4/5
Section “17. C2 Interface”
DD
Monitor
89
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