CY14B101LA-SP45XI Cypress Semiconductor Corp, CY14B101LA-SP45XI Datasheet - Page 12

• Manufacturer Part Number: CY14B101LA-SP45XI
• Description: IC NVSRAM 1MBIT 45NS 48SSOP
• Manufacturer: Cypress Semiconductor Corp
• Type: NVSRAMr

Specifications of CY14B101LA-SP45XI

• Format - Memory: RAM
• Memory Type: NVSRAM (Non-Volatile SRAM)
• Memory Size: 1M (128K x 8)
• Speed: 45ns
• Interface: Parallel
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Word Size: 8b
• Organization: 128Kx8
• Density: 1Mb
• Interface Type: Parallel
• Access Time (max): 45ns
• Package Type: SSOP
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 2.7V
• Operating Temp Range: -40C to 85C
• Pin Count: 48
• Mounting: Surface Mount
• Supply Current: 52mA
• Memory Configuration: 128K X 8
• Access Time: 45ns
• Supply Voltage Range: 2.7V To 3.6V
• Memory Case Style: SSOP
• No. Of Pins: 48
• Operating Temperature Range: -40°C To +85°C
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Notes
Document #: 001-42879 Rev. *K
22. BHE and BLE are applicable for x16 configuration only.
23. WE must be HIGH during SRAM read cycles.
24. HSB must remain HIGH during Read and Write cycles.
25. CE or WE must be > V
26. If WE is low when CE goes low, the outputs remain in the high impedance state.
Data Output
Data Output
Data Input
BHE, BLE
BHE, BLE
Address
Address
CE
OE
WE
CE
I
CC
IH
during address transitions.
High Impedance
Standby
Figure 7. SRAM Read Cycle #2: CE and OE Controlled
Figure 8. SRAM Write Cycle #1: WE Controlled
Previous Data
t
SA
t
PU
t
LZCE
t
LZOE
t
LZBE
t
Address Valid
t
AA
AW
t
ACE
t
t
HZWE
BW
Address Valid
t
SCE
t
t
t
PWE
DOE
DBE
t
RC
Active
t
WC
t
High Impedance
SD
Input Data Valid
Output Data Valid
t
LZWE
t
HD
[22, 24, 25, 26]
t
HA
[22, 23, 24]
t
t
t
HZBE
HZCE
HZOE
t
PD
CY14B101NA
CY14B101LA
Page 12 of 26
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