SST25VF032B-80-4I-S2AF Microchip Technology, SST25VF032B-80-4I-S2AF Datasheet - Page 3

• Manufacturer Part Number: SST25VF032B-80-4I-S2AF
• Description: IC FLASH SER 32M 80MHZ SPI 8SOIC
• Manufacturer: Microchip Technology

Specifications of SST25VF032B-80-4I-S2AF

• Memory Type: FLASH
• Memory Size: 32M (4M x 8)
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• Format - Memory: FLASH
• Speed: 80MHz
• Interface: SPI Serial
• Voltage - Supply: 2.7 V ~ 3.6 V
• Data Bus Width: 8 bit
• Interface Type: SPI
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.7 V
• Maximum Operating Current: 25 mA
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

32 Mbit SPI Serial Flash
SST25VF032B
PIN DESCRIPTION
TABLE 1: Pin Description
©2009 Silicon Storage Technology, Inc.
Symbol
SCK
SI
SO
RY/BY#
CE#
WP#
HOLD#
V
V
DD
SS
FIGURE 2: Pin Assignments for 8-Lead SOIC
Notes: 1. In AAI mode, the SO pin can act as a RY/BY# pin when configured as a ready/busy status pin. See “End-of-
WP#
CE#
V
SO
SS
Pin Name
Serial Clock
Serial Data Input
Serial Data Output
Ready / Busy pin
Chip Enable
Write Protect
Power Supply
Ground
Hold
Write Detection” on page 11 for details.
1
2
3
4
Top View
Functions
To provide the timing of the serial interface.
Commands, addresses, or input data are latched on the rising edge of the clock input,
while output data is shifted out on the falling edge of the clock input.
To transfer commands, addresses, or data serially into the device.
Inputs are latched on the rising edge of the serial clock.
To transfer data serially out of the device.
Data is shifted out on the falling edge of the serial clock.
Flash busy status pin in AAI mode if SO is configured as a hardware RY/BY# pin.
The device is enabled by a high to low transition on CE#. CE# must remain low for the
duration of any command sequence.
The Write Protect (WP#) pin is used to enable/disable BPL bit in the status register.
To temporarily stop serial communication with SPI flash memory without resetting the
device.
To provide power supply voltage: 2.7-3.6V
1327 8-SOIC P1.0
8
7
6
5
V
HOLD#
SCK
SI
DD
3
WP#
CE#
V
SO
SS
1
2
3
4
Top View
1327 8-WSON P1.0
8
7
6
5
S71327-03-000
V
HOLD#
SCK
SI
DD
Data Sheet
T1.0 1327
05/09