IS61LPS12836A-200TQLI ISSI, Integrated Silicon Solution Inc, IS61LPS12836A-200TQLI Datasheet - Page 11

• Manufacturer Part Number: IS61LPS12836A-200TQLI
• Description: IC SRAM 4MBIT 200MHZ 100TQFP
• Manufacturer: ISSI, Integrated Silicon Solution Inc
• Type: Synchronousr

Specifications of IS61LPS12836A-200TQLI

• Memory Size: 4M (128K x 36)
• Package / Case: 100-TQFP, 100-VQFP
• Interface: Parallel
• Format - Memory: RAM
• Memory Type: SRAM - Synchronous
• Speed: 200MHz
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Access Time: 3.1 ns
• Maximum Clock Frequency: 200 MHz
• Supply Voltage (max): 3.465 V
• Supply Voltage (min): 3.135 V
• Maximum Operating Current: 210 mA
• Organization: 128 K x 36
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Number Of Ports: 4
• Operating Supply Voltage: 2.5 V to 3.3 V
• Density: 4.5Mb
• Access Time (max): 3.1ns
• Sync/async: Synchronous
• Architecture: SDR
• Clock Freq (max): 200MHz
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 17b
• Package Type: TQFP
• Operating Temp Range: -40C to 85C
• Supply Current: 210mA
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.465V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Word Size: 36b
• Number Of Words: 128K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 706-1098; IS61LPS12836A-200TQLI

IS61(64)LPS12832A
IS61(64)LPS12836A IS61(64)VPS12836A
IS61(64)LPS25618A IS61(64)VPS25618A
LINEAR BURST ADDRESS TABLE (MODE = VSS)
ABSOLUTE MAXIMUM RATINGS
Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause perma-
2. This device contains circuity to protect the inputs against damage due to high static voltages or
3. This device contains circuitry that will ensure the output devices are in High-Z at power up.
Integrated Silicon Solution, Inc.
Rev. H
01/07/2010
INTERLEAVED BURST ADDRESS TABLE (MODE = V
External Address
Symbol
T
P
I
V
V
V
nent damage to the device. This is a stress rating only and functional operation of the device at
these or any other conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
electric fields; however, precautions may be taken to avoid application of any voltage higher than
maximum rated voltages to this high-impedance circuit.
OUT
STG
IN
IN
D
DD
, V
A1 A0
A1', A0' = 1,1
OUT
00
01
10
11
Parameter
Storage Temperature
Power Dissipation
Output Current (per I/O)
Voltage Relative to Vss for I/O Pins
Voltage Relative to Vss for
for Address and Control Inputs
Voltage on V
1st Burst Address
DD
Supply Relative to Vss
A1 A0
01
00
11
10
0,0
1,0
(1)
2nd Burst Address
–0.5 to V
0,1
A1 A0
–0.5 to V
10
11
00
01
–55 to +150
–0.5 to 4.6
Value
100
1.6
DDQ
DD
DD
+ 0.5
+ 0.5
or No Connect)
3rd Burst Address
Unit
mA
°C
W
V
V
V
A1 A0
11
10
01
00
11