CY7C1418BV18-167BZC Cypress Semiconductor Corp, CY7C1418BV18-167BZC Datasheet - Page 21

• Manufacturer Part Number: CY7C1418BV18-167BZC
• Description: IC SRAM 36MBIT 167MHZ 165TFBGA
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C1418BV18-167BZC

• Format - Memory: RAM
• Memory Type: SRAM - Synchronous, DDR II
• Memory Size: 36M (2M x 18)
• Speed: 167MHz
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.9 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 165-TFBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Switching Characteristics
Over the Operating Range
Notes
Document Number: 001-07033 Rev. *H
Parameter
t
t
t
t
t
t
Setup Times
t
t
t
t
Hold Times
t
t
t
t
21. When a part with a maximum frequency above 167 MHz is operating at a lower clock frequency, it requires the input timings of the frequency range in which it is being
22. This part has an internal voltage regulator; t
POWER
CYC
KH
KL
KHKH
KHCH
SA
SC
SCDDR
SD
HA
HC
HCDDR
HD
Cypress
operated and outputs data with the output timings of that frequency range.
t
t
t
t
t
t
t
t
t
t
t
t
t
Consortium
KHKH
KHKL
KLKH
KHKH
KHCH
AVKH
IVKH
IVKH
DVKH
KHAX
KHIX
KHIX
KHDX
Parameter
V
K Clock and C Clock Cycle Time
Input Clock (K/K and C/C) HIGH
Input Clock (K/K and C/C) LOW
K Clock Rise to K Clock Rise and C to C Rise
(rising edge to rising edge)
K/K Clock Rise t o C/C Clock Rise
(rising edge to rising edge)
Address Setup to K Clock Rise
Control Setup to K Clock Rise (LD, R/W)
Double Data Rate Control Setup to Clock (K/K)
Rise (BWS
D
Address Hold after K Clock Rise
Control Hold after K Clock Rise (LD, R/W)
Double Data Rate Control Hold after Clock (K/K)
Rise (BWS
D
DD
[X:0]
[X:0]
[20, 21]
(Typical) to the First Access
Hold after Clock (K/K) Rise
Setup to Clock (K/K) Rise
0
0
POWER
, BWS
, BWS
Description
is the time that the power is supplied above V
1
1
, BWS
, BWS
2
2
, BWS
, BWS
[22]
3
3
)
)
3.75
1.68
Min Max Min Max Min Max Min Max
1.5
1.5
0.0
0.3
0.3
0.3
0.3
0.3
0.3
0.3
0.3
267 MHz
1
DD
1.68
min initially before a read or write operation can be initiated.
8.4
–
–
–
–
–
–
–
–
–
–
–
–
0.35
0.35
0.35
0.35
4.0
1.6
1.6
1.8
0.0
0.5
0.5
0.5
0.5
250 MHz
1
8.4
1.8
–
–
–
–
–
–
–
–
–
–
–
–
5.0
2.0
2.0
2.2
0.0
0.6
0.6
0.4
0.4
0.6
0.6
0.4
0.4
200 MHz
1
CY7C1418BV18
CY7C1420BV18
8.4
2.2
–
–
–
–
–
–
–
–
–
–
–
–
6.0
2.4
2.4
2.7
0.0
0.7
0.7
0.5
0.5
0.7
0.7
0.5
0.5
167 MHz
1
Page 21 of 27
8.4
2.7
–
–
–
–
–
–
–
–
–
–
–
–
Unit
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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