VRS51C1100-40-Q-ISPV2 Cypress Semiconductor, VRS51C1100-40-Q-ISPV2 Datasheet - Page 9

• Manufacturer Part Number: VRS51C1100-40-Q-ISPV2
• Description: 8-bit Microcontrollers - MCU 128K+1K 40MHz 5V
• Manufacturer: Cypress Semiconductor

Specifications of VRS51C1100-40-Q-ISPV2

• Product Category: 8-bit Microcontrollers - MCU
• Core: 8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 40 MHz
• Program Memory Size: 64 KB
• Data Ram Size: 1 KB
• Operating Supply Voltage: 4.5 V to 5.5 V
• Package / Case: QFP-44
• Mounting Style: SMD/SMT
• Data Rom Size: 128 B
• Interface Type: UART
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 36
• Number Of Timers: 3
• Program Memory Type: Flash
• Factory Pack Quantity: 96
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 4.5 V

IAP Flash Control Register
The
controlled
IAPFCTRL.
T
VRS51C1100 IAP operations can be performed in
either the 64KB Flash program memory zone or the
64KB data Flash memory zone. The FZONE bit selects
the area in which the IAP operations will be performed
and acts as the 17
FZONE = 0: IAP functions target program Flash
FZONE = 1: IAP functions target data Flash
Setting the IAPSTART bit to 1 starts the execution of
the IAP command specified by the IAPFCT[1:0] bits of
the IAP Flash control register.
If the IAPSTART bits equal 0, no IAP operations will be
performed.
The IAP subsystem handles four different functions.
The IAP function performed is controlled by the
IAPFCT bits, as shown below:
T
When activated, the Flash Erase function will erase the
entire VRS51C1100 Flash memory except for the ISP
boot program, if the ISP config bits (lock) have been
activated. Be careful when performing Flash Erase
under final application program control.
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ABLE
ABLE
Bit
7
6
5
4
3
2
1
0
VRS51C1100
7
10:IAP F
11:IAP F
IAPFCT[1:0] Bits value
VRS51C1100’s
Mnemonic
IAPSTART
Unused
FZONE
Unused
Unused
Unused
IAPFCT[1:0]
6
LASH
UNCTIONS
by
C
ONTROL
5
00
01
10
11
the
th
Description
IAP Selected operation Start sequence
-
Flash zone select for IAP Flash operations:
0: Flash Program Zone
1: Flash Data Zone
-
-
-
Flash Memory IAP Function (see below)
R
bit of the 128KB Flash address.
EGISTER
IAPFCTRL[15:8]
4
IAP
IAP
(IAPFCTRL) - SFR F7
3
Flash
function
Flash Byte Program
Flash Erase Protect
2
Flash Page Erase
IAP Function
control
Flash Erase
H
operation
1
register,
0
is
Note that for security reasons, the IAPSTART bit of the
IAPFCTRL register is configured as read-only by
default.
To set the IAPSTART to 1, the following operation
sequence must be performed first:
Once the start bit is set to 1, the IAP subsystem will
read the contents of the IAP Flash address and data
registers and hold the VRS51C1100 program counter
at its current value until the IAP operation is complete.
When the IAP operation is complete, the IAPSTART bit
will be cleared and the program will continue
executing.
IAP Byte Program in the VRS51C1100 Program
Flash
The IAP byte program function is used to program a
byte into a specified program memory location under
the control of the IAP feature. See the following
program example:
IAP_PROG: MOV
IAP Byte Program in the VRS51C1100 Data Flash
The IAP byte program function can also be used to
program a byte into a specified data Flash memory
location under the control of the IAP feature. See the
following program example:
IAP_PROG: MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
;**The program Counter will stop until the IAP function is completed
MOV
MOV
MOV
MOV
MOV
MOV
MOV
;**The program Counter will stop until the IAP function is completed
IAPFDATA,#55h
IAPFDATA,#AAh
IAPFDATA,#55h
IAPFDATA,#55H
IAPFDATA,#0AAH
IAPFDATA,#55H
SYSCON,#04H
IAPFADHI, FADRSH
IAPFADLO,FADRSL
IAPFDATA,FDATA
IAPFCTRL,#80H
IAPFDATA,#55H
IAPFDATA,#0AAH
IAPFDATA,#55H
SYSCON,#0CH
IAPFADHI, FADRSH
IAPFADLO,FADRSL
IAPFDATA,FDATA
IAPFCTRL,#A0H
;Sequence to Enable Writing
; the IAPSTART bit
;ENABLE IAP FUNCTION
;Set MSB of address to program
;Set LSB of address to program
;Set Data to Program
;Set the IAP Start bit + Byte Program
;Sequence to Enable Writing
; the IAPSTART bit
;ENABLE IAP FUNCTION + Enable
;Data Flash
;Set MSB of address to program
;Set LSB of address to program
;Set Data to Program
;Set the IAP Start bit + FZONE bit
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