SST89E554RC-40-C-PI Microchip Technology, SST89E554RC-40-C-PI Datasheet - Page 22

• Manufacturer Part Number: SST89E554RC-40-C-PI
• Description: 8-bit Microcontrollers - MCU 32KB+8KB 40ns
• Manufacturer: Microchip Technology

Specifications of SST89E554RC-40-C-PI

• Core: 8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 40 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 1 KB
• On-chip Adc: No
• Operating Supply Voltage: 4.5 V to 5.5 V
• Package / Case: PDIP-40
• Mounting Style: Through Hole
• Data Rom Size: 128 B
• Interface Type: SPI, UART
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Number Of Programmable I/os: 32
• Number Of Timers: 16 bit
• On-chip Dac: No
• Processor Series: FlashFlex
• Program Memory Type: Flash
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 4.5 V

EOL Data Sheet
SuperFlash Configuration Register (SFCF)
SuperFlash Command Register (SFCM)
SuperFlash Address Registers (SFAL)
SuperFlash Address Registers (SFAH)
©2007 Silicon Storage Technology, Inc.
Location
Location
Location
Location
B1H
B2H
B3H
B4H
Symbol
IAPEN
SWR
BSEL
Symbol
FIE
FCM[6:0]
Symbol
SFAL
Symbol
SFAH
FIE
7
7
7
7
-
IAPEN
FCM6
6
Function
Enable IAP operation
0: IAP commands are disabled
1: IAP commands are enabled
Software Reset
See Section 10.2, “Software Reset”
Program memory block switching bit
See Figure 3-1, Figure 3-2, Table 3-3, and Table 3-4.
6
Function
Flash Interrupt Enable.
0: INT1# is not reassigned.
1: INT1# is re-assigned to signal IAP operation completion.
Flash operation command
000_0001b Chip-Erase
000_1011b Sector-Erase
000_1101b Block-Erase
000_1100b Byte-Verify
000_1110b Byte-Program
000_1111b Prog-SB1
000_0011b Prog-SB2
000_0101b Prog-SB3
000_1001b Prog-SC0
000_1001b Prog-SC1
000_1000bEnable-Clock-Double
All other combinations are not implemented, and reserved for future use.
1. Byte-Verify has a single machine cycle latency and will not generate any INT1# interrupt regardless of FIE.
6
Function
Mailbox register for interfacing with flash memory block. (Low order address register).
6
Function
Mailbox register for interfacing with flash memory block. (High order address register).
External INT1# interrupts are ignored.
SuperFlash High Order Byte Address Register
SuperFlash Low Order Byte Address Register
FCM5
5
5
5
5
-
FCM4
4
4
4
4
-
1
22
FCM3
3
3
3
3
-
FCM2
SST89E564RD / SST89V564RD
SST89E554RC / SST89V554RC
2
2
2
2
-
FCM1
SWR
1
1
1
1
FCM0
BSEL
FlashFlex MCU
0
0
0
0
S71207-08-EOL
Reset Value
Reset Value
Reset Value
Reset Value
x0xxxx00b
00H
00H
00H
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