SST89E554RC-40-C-PI Microchip Technology, SST89E554RC-40-C-PI Datasheet - Page 60

• Manufacturer Part Number: SST89E554RC-40-C-PI
• Description: 8-bit Microcontrollers - MCU 32KB+8KB 40ns
• Manufacturer: Microchip Technology

Specifications of SST89E554RC-40-C-PI

• Core: 8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 40 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 1 KB
• On-chip Adc: No
• Operating Supply Voltage: 4.5 V to 5.5 V
• Package / Case: PDIP-40
• Mounting Style: Through Hole
• Data Rom Size: 128 B
• Interface Type: SPI, UART
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Number Of Programmable I/os: 32
• Number Of Timers: 16 bit
• On-chip Dac: No
• Processor Series: FlashFlex
• Program Memory Type: Flash
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 4.5 V

EOL Data Sheet
TABLE
9.4 Read Operation Under Lock Condition
The status of security bits SB1, SB2, and SB3 can be read
when the read command is disabled by security lock.
There are three ways to read the status.
©2007 Silicon Storage Technology, Inc.
1. External host mode: Read-back = 00H (locked)
2. IAP command: Read-back = previous SFDT data
3. MOVC: Read-back = FFH (blank)
Level
1. P = Programmed (Bit logic state = 0), U = Unprogrammed (Bit logic state = 1).
2. SFST[7:5] = Security Lock Status Bits (SB1_i, SB2_i, SB3_i)
1
2
3
4
9-1: S
SFST[7:5]
000
100
011
101
010
110
001
111
ECURITY
Security Lock Bits
SB1
L
U
U
U
U
P
P
P
P
OCK
O
PTIONS
SB2
U
U
P
U
P
P
U
P
1
1,2
SB3
U
U
P
P
U
U
P
P
1
Unlock
SoftLock
Hard Lock
SoftLock
Hard Lock
Hard Lock
Block 1
Security Status of:
60
Unlock
SoftLock
Hard Lock
SoftLock
SoftLock
Hard Lock
Block 0
SST89E564RD / SST89V564RD
SST89E554RC / SST89V554RC
Security Type
No Security Features are Enabled.
MOVC instructions executed from
external program memory are dis-
abled from fetching code bytes from
internal memory, EA# is sampled and
latched on Reset, and further pro-
gramming of the flash is disabled.
Level 2 plus Verify disabled, both
blocks locked.
Level 2 plus Verify disabled. Code in
Block 1 may program Block 0 and vice
versa.
Level 2 plus Verify disabled. Code in
Block 1 may program Block 0.
Same as Level 3 hard lock/hard lock,
but MCU will start code execution
from the internal memory regardless
of EA#.
FlashFlex MCU
S71207-08-EOL
T9-1.3 1207
1/07