P9030-EVK IDT, P9030-EVK Datasheet
P9030-EVK
Specifications of P9030-EVK
Related parts for P9030-EVK
P9030-EVK Summary of contents
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... WPC-compliant message packets sent by the mobile device to adjust the transferred power. The IDTP9030 is an intelligent device that periodically pings the area surrounding the base station to detect a mobile device for charging while minimizing idle power. Once the mobile device is detected and ...
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... TOP selection. Revision 1.0.1 IDTP9030 IN REG_IN 1uF BUCK5VT_IN 10uF BUCK5VT LDO2P5V_IN BUCK5VT_SNS EN RESET 1uF SCL SDA 2 GND EP REFGND AGND Figure 1. IDTP9030 Simplified Application Schematic NTC 2 SW WPC TX-A1 1 100nF PGND (3x33nF) GPIO_1 22nF VOSNS 1 4.7nF 47K 10K 20K 10K ISNS 2.2nF 1 1 1.8nF 3 ...
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... These absolute maximum ratings are stress ratings only. Stresses greater than those listed below (Table 1 and Table 2) may cause permanent damage to the device. Functional operation of the IDTP9030 at absolute maximum ratings is not implied. Exposure to absolute maximum rating conditions for extended periods may affect long-term reliability. ...
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... IDTP9030 Product Datasheet Table 3. ESD Information TEST PINS MODEL All, except IN HBM Only IN (37, 38 and 39) CDM All Revision 1.0.1 MAXIMUM RATINGS ±1000 ±800 ±500 4 © 2012 Integrated Device Technology, Inc. UNITS V V ...
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... BLOCK DIAGRAM Revision 1.0.1 Figure 2. IDTP9030 Internal Functional Block Diagram IDTP9030 Product Datasheet 5 © 2012 Integrated Device Technology, Inc. ...
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... IDTP9030 Product Datasheet ELECTRICAL CHARACTERISTICS = RESET = 0V REG_IN = BUCK5VT_IN = 19V. T 25C, unless otherwise noted. Table 4. Device Characteristics SYMBOL DESCRIPTION Half-Bridge Inverter Input Supply V Operating Voltage IN Range 1 Standby Input I IN_A Current Sleep Mode Input I IN_S Current F Switching Frequency SW_LOW at SW ...
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... ¯¯ 20V EN ¯¯ =-8mA OH I =8mA OL EEPROM loading, Step 1, IDTP9030 as Master EEPROM loading, Step 2, IDTP9030 as Master IDTP9030 as Slave CBUS-compatible masters I C-bus devices 2 7 IDTP9030 Product Datasheet MIN TYP MAX UNITS 140 C 110 900 mV 550 mV 7.5 μA 56 μ ...
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... IDTP9030 Product Datasheet ELECTRICAL CHARACTERISTICS = RESET = 0V REG_IN = BUCK5VT_IN = 19V. T 25C, unless otherwise noted. Table 6. Device Characteristics, Continued SYMBOL DESCRIPTION Bus Free Time T Between STOP and BUF START Condition Capacitive Load for C B Each Bus Line SCL, SDA Input C BIN ...
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... GPIO_6 1 GPIO_5 2 GPIO_4 3 GPIO_3 4 GPIO_2 5 GPIO_1 6 GPIO_0 7 SCL 8 SDA 9 XTAL/CLK_IN 10 XTAL/CLK_OUT 11 RESET Figure 3. IDTP9030 Pin Configuration (NTG48 TQFN-48L 6 6 0.75 mm, 0.4mm pitch) Revision 1.0.1 TQFN-48L (Center Exposed Pad IDTP9030 Product Datasheet ...
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... IDTP9030 Product Datasheet PIN DESCRIPTION Table 7. IDTP9030 NTG48 Package Pin Functions by Pin Number () PIN NAME TYPE 1 GPIO_6 I/O 2 GPIO_5 I/O 3 GPIO_4 I/O 4 GPIO_3 I/O 5 GPIO_2 I/O 6 GPIO_1 I/O 7 GPIO_0 I/O 8 SCL I/O 9 SDA I/O 10 XTAL/CLK_IN I 11 XTAL/CLK_OUT O 12 RESET REFGND - 15 REG_IN LDO5V LDO2P5V LDO2P5V_IN I 19 ...
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... Table 7. IDTP9030 NTG48 Package Pin Functions by Pin Number () PIN NAME TYPE 20 BST I 21 AGND - 22 DGND - BUCK5VT_IN BUCK5VT_SNS VOSNS I 28 PGND - 29 PGND - 30 PGND - PGND - ...
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... IDTP9030 Product Datasheet Table 7. IDTP9030 NTG48 Package Pin Functions by Pin Number () PIN NAME TYPE 41 HPF GND - Center Exposed EP Thermal Pad IN, REG_IN, BUCK5VT_IN. These pins must be connected together at all times. Note 1: LDO2P5V, and LDO5V are intended only as internal device supplies and must not be loaded externally except for the EEPROM, Note 2: DC-DC BUCK5VT, thermistor, LED, buzzer and pull up resistor loads ( absolute maximum of 25mA), as recommended in Figure 15 WPC “ ...
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... TYPICAL PERFORMANCE CHARACTERISTICS , IN = BUCK5VT_IN = REG_IN = 19V System Efficiency versus RX Output Power: TX Input to RX Output (IDTP9030 "Qi" TX-A1 Evaluation Kit and IDTP9020 CSP Engineering Sample PCB V1.0) 80.00% 70.00% 60.00% 50.00% 40.00% 30.00% 20.00% 10.00% 0 0.5 Figure 4. Efficiency vs. RX Output Power with IDTP9020 Receiver (IDTP9030 "Qi" TX-A1 Evaluation Kit and AVID Technologies, Inc., Qi Receiver ...
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... LDO2P5V 1uF BUCK5VT_SNS LX BST _T EN RESET_T RESET GPIO_4 1uF SCL_T SCL SDA_T SDA GPIO_2 GPIO_3 2 GND GPIO_0 EP REFGND AGND DGND Figure 6. IDTP9030/IDTP9020 Simplified Systems Application Diagram Revision 1.0 Load L p Power EN _R WPC TX-A1 1 100nF VO (3x33nF) 250V 1.5K L 22nF 20K CRX 1 4.7nF 47K 10K 1 1 ...
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... The current in the inverter is monitored by an analog Current Limit block. If the instantaneous coil current exceeds 2A, the chip is shut down. VIN_OVP monitors the voltage applied to the IDTP9030 by the external AC adapter and shuts the part down if the adapter voltage rises above 24V, to protect against excessive power transfer to the receiver ...
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... I and SDA pins. APPLICATIONS INFORMATION The recommended applications schematic diagram is shown in Figure 15. The IDTP9030 operates with a 19V (±1V) input. The switching frequency varies from 110kHz to 205kHz. At the 205kHz limit the duty cycle is also variable. The power transfer is controlled via changes in switching frequency. The base or TX-side has a series resonance circuit made of a WPC Type-A1 coil (~24 ...
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... IDT recommends using the internal oscillator. SYSTEM FEEDBACK CONTROL (WPC) RESET The IDTP9030 contains logic to demodulate and decode error packets sent by the mobile device (Rx-side), and adjusts power transfer accordingly. The IDTP9030 varies the switching frequency of the half bridge inverter between 110kHz to 205 kHz ...
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... If the IDTP9030 does not detect the start bit of the header byte of the Signal Strength Packet during the Ping Phase, it removes the power signal after a delay signal strength packet is received, the IDTP9030 goes to the Identification and Configuration Phase ...
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... Upon receiving a Control Error value, the IDTP9030 makes adjustments to its operating point after a delay to enable the Primary Coil current to stabilize again after communication. If the IDTP9030 correctly receives a Packet that does not comply with the sequence, then it removes the Power Signal. FOREIGN OBJECT DETECTION (FOD) ...
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... VCC SCL 4 5 VSS SDA 24LC64 Figure 15. IDTP9030 WPC “Qi” Compliance Schematic (See IDTP9030 valuation Kit User Manual for complete details) Revision 1.0 VIN 82uF/25V OSCON 0.1uF C6 C7 C10 22uF/25V 22uF/25V 0.1uF 7 GPIO_0 4 GPIO_3 2 ...
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... Table 6. IDTP9030 WPC “Qi” Compliance Bill of Materials Item # Qty Ref Design C2,C16,C22 1 3 C20,C23,C25 Option C20,C23 Option 2 C8,C9,C11,C12,C29 3 5 C7, C10, C13, C14 C17 5 1 C21 6 1 C15 C26 9 1 C18 10 1 C24 11 1 C27 ...
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... IDT sales for more information. IDT will provide the appropriate image in the format best suited to the application. Overview of Standard GPIO Usage There are 7 GPIO’s on the IDTP9030 transmitter IC, of which five are available for use as follows: GPIO0: Red LED_A to indicate standby, fault conditions, and FOD warnings ...
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... Table 7 – IDTP9030 LED Resistor Optioning (Not all options supported, shaded rows are for future development). LED Control LED Select Option Resistor Value 1 Pull Down Standby LEDs Standby LEDs ON plus 3 R2 Standby LEDs ON plus 4 R3 Standby LEDs ON plus 5 R4 Standby LEDs ON plus ...
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... The TX-A1 power transmitter coil is mounted on a ferrite shield to reduce EMI. The coil assembly can be mounted next to the IDTP9030. Either ground plane or grounded copper shielding can be added beneath the ferrite shield for added reduction in radiated electrical field emissions. The coil ground plane/shield must be connected to the IDTP9030 ground plane by a single trace ...
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... PCB Layout Considerations section. The techniques as noted in the PCB Layout section need to be followed when designing the printed circuit board layout, as well as the placement of the IDTP9030 IC package in proximity to other heat generating devices in a given application design. The ambient temperature around the power IC will also have an effect on the thermal limits of an application. The main factors influencing θ ...
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... To allow the maximum load current on each regulator and resonant transmitter, and to prevent thermal overload important to ensure that the heat generated by the IDTP9030 is dissipated into the PCB. The package exposed paddle must be soldered to the PCB, with multiple vias evenly distributed under the exposed paddle and exiting the bottom side of the PCB ...
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... PACKAGE OUTLINE DRAWING BOTTOM VIEW ± 6.00 0.10 4.40 Ref. DAP SIZE 4.5x4 C0.35 ± 4.10 0. 0.40 BSC SIDE VIEW Figure 17. IDTP9030 Package Outline Drawing (NTG48 TQFN-48L 6 6 0.75 mm48L, 0.4mm pitch) Revision 1.0 DCN REV ± 0.20 0.05 TOLERANCES UNLESS SPECIFIED DECIMAL ANGULAR X± .1 ±1° ...
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... PACKAGE NUMBER P9030-0NTGI P9030NTG NTG48 - TQFN-48 6x6x0.75mm P9030-0NTGI8 P9030NTG NTG48 - TQFN-48 6x6x0.75mm www.IDT.com 6024 Silver Creek Valley Road San Jose, California 95138 Tel: 800-345-7015 DISCLAIMER Integrated Device Technology, Inc. (IDT) and its subsidiaries reserve the right to modify the products and/or specifications described herein at any time and at IDT’s sole discretion. All information in this document, including descriptions of product features and performance, is subject to change without notice ...