IS42S32800D-6BL ISSI, Integrated Silicon Solution Inc, IS42S32800D-6BL Datasheet - Page 9

• Manufacturer Part Number: IS42S32800D-6BL
• Description: IC SDRAM 256MBIT 166MHZ 90BGA
• Manufacturer: ISSI, Integrated Silicon Solution Inc
• Type: SDRAMr

Specifications of IS42S32800D-6BL

• Format - Memory: RAM
• Memory Type: SDRAM
• Memory Size: 256M (8Mx32)
• Speed: 166MHz
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 90-BGA
• Organization: 8Mx32
• Density: 256Mb
• Address Bus: 13b
• Access Time (max): 6.5/5.4ns
• Maximum Clock Rate: 166MHz
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Supply Current: 180mA
• Pin Count: 90
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

IS42S32800D, IS45S32800D
Note: H=V
FUNCTIONAL TRUTH TABLE
Current State
Idle
Row Active
Read
Write
Integrated Silicon Solution, Inc. - www.issi.com
Rev. C
12/01/09
ih
, L=V
il
x= V
CS
H
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
ih
or V
X
H
H
H
H
L
L
L
L
X
H
H
H
H
L
L
L
L
X
H
H
H
H
L
L
L
L
X
H
H
H
H
L
L
L
L
RAS CAS
il
, V = Valid Data, BA= Bank Address, CA+Column Address, RA=Row Address, OC= Op-Code
X
H
H
L
L
H
H
L
L
X
H
H
L
L
H
H
L
L
X
H
H
L
L
H
H
L
L
X
H
H
L
L
H
H
L
L
WE
X
H
L
H
L
H
L
H
L
X
H
L
H
L
H
L
H
L
X
H
L
H
L
H
L
H
L
X
H
L
H
L
H
L
H
L
Address
X
X
X
BA, CA, A10
A, CA, A10
BA, RA
BA, A10
X
OC, BA1=L
X
X
X
BA, CA, A10
BA, CA, A10
BA, RA
BA, A10
X
OC, BA
X
X
X
BA, CA, A10
BA, CA, A10
BA, RA
BA, A10
X
OC, BA
X
X
X
BA, CA, A10
BA, CA, A10
BA, RA
BA, A10
X
OC, BA
Command
DESL
NOP
BST
READ/READA
WRIT/ WRITA
ACT
PRE/PALL
REF/SELF
MRS
DESL
NOP
BST
READ/READA
WRIT/ WRITA
ACT
PRE/PALL
REF/SELF
MRS
DESL
NOP
BST
READ/READA
WRIT/WRITA
ACT
PRE/PALL
REF/SELF
MRS
DESL
NOP
BST
READ/READA
WRIT/WRITA
RA ACT
PRE/PALL
REF/SELF
MRS
Action
Nop or Power Down
Nop or Power Down
Nop or Power Down
ILLEGAL
ILLEGAL
Row activating
Nop
Auto refresh or Self-refresh
Mode register set
Nop
Nop
Nop
Begin read
Begin write
ILLEGAL
Precharge
Precharge all banks
ILLEGAL
ILLEGAL
Continue burst to end to
Row active
Continue burst to end Row
Row active
Burst stop, Row active
Terminate burst,
begin new read
Terminate burst,
begin write
ILLEGAL
Terminate burst
Precharging
ILLEGAL
ILLEGAL
Continue burst to end
Write recovering
Continue burst to end
Write recovering
Burst stop, Row active
Terminate burst, start read :
Determine AP
Terminate burst, new write :
Determine AP
ILLEGAL
Terminate burst Precharging
ILLEGAL
ILLEGAL
(3)
(3)
(3)
(3)
(3)
(5)
(7,8)
(5)
(7,8)
(7)
(7)
(2)
(2)
(6)
(4)
(9)
9