M27C512-90F6 STMicroelectronics, M27C512-90F6 Datasheet - Page 6

• Manufacturer Part Number: M27C512-90F6
• Description: IC EPROM 512KBIT 90NS 28CDIP
• Manufacturer: STMicroelectronics

Specifications of M27C512-90F6

• Format - Memory: EPROMs
• Memory Type: UV EPROM
• Memory Size: 512K (64K x 8)
• Speed: 90ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-CDIP (0.600", 15.24mm) Window
• Memory Configuration: 64K X 8
• Access Time: 90ns
• Supply Voltage Range: 4.5V To 5V
• Memory Case Style: DIP
• No. Of Pins: 28
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

M27C512
DEVICE OPERATION
The modes of operations of the M27C512 are list-
ed in the Operating Modes table. A single power
supply is required in the read mode. All inputs are
TTL levels except for GV
Electronic Signature.
Read Mode
The M27C512 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. Chip Enable (E) is the power
control and should be used for device selection.
Output Enable (G) is the output control and should
be used to gate data to the output pins, indepen-
dent of device selection. Assuming that the ad-
Table 2. Operating Modes
Note: X = V
Table 3. Electronic Signature
Two Line Output Control
Because EPROMs are usually used in larger
memory arrays, the product features a 2 line con-
trol function which accommodates the use of mul-
tiple memory connection. The two line control
function allows:
a. the lowest possible memory power
b. complete assurance that output bus
For the most efficient use of these two control
lines, E should be decoded and used as the prima-
ry device selecting function, while G should be
made a common connection to all devices in the
array and connected to the READ line from the
system control bus. This ensures that all deselect-
ed memory devices are in their low power standby
mode and that the output pins are only active
6/22
Read
Output Disable
Program
Program Inhibit
Standby
Electronic Signature
Manufacturer’s Code
Device Code
dissipation,
contention will not occur.
Identifier
IH
or V
IL
, V
Mode
ID
= 12V ± 0.5V.
V
A0
V
IH
IL
PP
and 12V on A9 for
Q7
0
0
Q6
0
0
V
IL
V
V
V
V
V
Pulse
E
IH
IH
IL
IL
IL
Q5
1
1
dresses are stable, the address access time
(t
(t
of t
E has been low and the addresses have been sta-
ble for at least t
Standby Mode
The M27C512 has a standby mode which reduces
the active current from 30mA to 100µA The
M27C512 is placed in the standby mode by apply-
ing a CMOS high signal to the E input. When in the
standby mode, the outputs are in a high imped-
ance state, independent of the GV
when data is required from a particular memory
device.
System Considerations
The power switching characteristics of Advanced
CMOS EPROMs require careful decoupling of the
devices. The supply current, I
ments that are of interest to the system designer:
the standby current level, the active current level,
and transient current peaks that are produced by
the falling and rising edges of E. The magnitude of
the transient current peaks is dependent on the
capacitive and inductive loading of the device at
the output. The associated transient voltage peaks
can be suppressed by complying with the two line
output control and by properly selected decoupling
capacitors. It is recommended that a 0.1µF ceram-
ic capacitor be used on every device between V
and V
tor of low inherent inductance and should be
placed as close to the device as possible. In addi-
Q4
AVQV
ELQV
0
1
GLQV
GV
SS
). Data is available at the output after a delay
V
V
) is equal to the delay from E to output
V
V
V
X
PP
PP
IH
IL
IL
. This should be a high frequency capaci-
PP
from the falling edge of G, assuming that
Q3
0
1
AVQV
Q2
0
1
-t
GLQV
V
A9
X
X
X
X
X
ID
Q1
0
0
.
CC
Q0
, has three seg-
0
1
PP
input.
Data Out
Data In
Q7-Q0
Codes
Hi-Z
Hi-Z
Hi-Z
Hex Data
3Dh
20h
CC