PSD4235G2-90UI STMicroelectronics, PSD4235G2-90UI Datasheet - Page 120

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PSD4235G2-90UI

Manufacturer Part Number
PSD4235G2-90UI
Description
IC FLASH 4MBIT 90NS 80TQFP
Manufacturer
STMicroelectronics
Datasheet

Specifications of PSD4235G2-90UI

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
4M (512K x 8)
Speed
90ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-1969

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DC and AC parameters
Table 68.
1. Any input used to select an internal PSD function.
2. WR has the same timing as E, DS, LDS, UDS, WRL, and WRH signals.
3. tWHAX is 6 ns when writing to the output macrocell registers AB and BC.
4. tWHAX2 is the address hold time for DPLD inputs that are used to generate Sector Select signals for internal PSD memory.
5. Assuming WRITE is active before data becomes valid.
6. In multiplexed mode, latched address generated from ADIO delay to address output on any port.
7. Assuming data is stable before active WRITE signal.
Figure 46. Peripheral I/O read timing
120/129
t
t
t
t
Symbol
WHPV
DVMV
AVPV
WLMV
Trailing edge of WR to Port output
Valid Using I/O Port Data register
Data Valid to Port output Valid
Using macrocell register
Preset/Clear
Address input Valid to Address
Output Delay
WR Valid to Port output Valid Using
Macrocell register Preset/Clear
A /D BUS
ALE /AS
WRITE timing
CSI
RD
Parameter
ADDRESS
t AVQV ( PF)
t SLQV (PF)
Conditions
t RLQV (PF)
t RLRH (PF)
(2)(5)
(2)(7)
(2)
(6)
DATA ON PORT F
Min
t DVQV (PF)
DATA VALID
-70
Max
27
42
20
48
t QXRH ( PF)
t RHQZ ( PF)
Min
-90
PSD4235G2
Max
30
55
25
55
AI05740
Unit
ns
ns
ns
ns

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