PSD4235G2-90UI STMicroelectronics, PSD4235G2-90UI Datasheet - Page 40

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PSD4235G2-90UI

Manufacturer Part Number
PSD4235G2-90UI
Description
IC FLASH 4MBIT 90NS 80TQFP
Manufacturer
STMicroelectronics
Datasheet

Specifications of PSD4235G2-90UI

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
4M (512K x 8)
Speed
90ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-1969

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Instructions
8.2
8.3
8.4
8.5
8.6
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Reading Flash memory
Under typical conditions, the MCU may read the primary Flash memory, or secondary Flash
memory, using READ operations just as it would a ROM or RAM device. Alternately, the
MCU may use READ operations to obtain status information about a Program or Erase
cycle that is currently in progress. Lastly, the MCU may use instructions to read special data
from these memory blocks. The following sections describe these READ functions.
Read memory contents
Primary Flash memory and secondary Flash memory are placed in the READ mode after
Power-up, chip reset, or a Reset Flash instruction (see
memory contents of the primary Flash memory, or the secondary Flash memory by using
READ operations any time the READ operation is not part of an instruction.
Read Primary Flash identifier
The primary Flash memory identifier is read with an instruction composed of 4 operations: 3
specific WRITE operations and a READ operation (see
primary Flash memory is E8h. The secondary Flash memory does not support this
instruction.
Read Memory Sector Protection status
The Flash memory Sector Protection Status is read with an instruction composed of four
operations: three specific WRITE operations and a READ operation (see
READ operation produces 01h if the Flash memory sector is protected, or 00h if the sector
is not protected.
The sector protection status for all NVM blocks (primary Flash memory, or secondary Flash
memory) can be read by the MCU accessing the Flash Protection and Flash Boot Protection
registers in PSD I/O space. See
definitions.
Reading the Erase/Program status bits
The PSD provides several status bits to be used by the MCU to confirm the completion of an
Erase or Program cycle of Flash memory. These status bits minimize the time that the MCU
spends performing these tasks and are defined in
even location, and can be read as many times as needed. Also note that DQ15-DQ8 is an
even byte for Motorola MCUs with a 16-bit data bus.
For Flash memory, the MCU can perform a READ operation to obtain these status bits while
an Erase or Program instruction is being executed by the embedded algorithm. See
Section 9: Programming Flash
memory, for details.
Section 11.1: Flash Memory Sector
Table
Table
Table
30. The status byte resides in an
29). The MCU can read the
29). The identifier for the
Protect, for register
Table
PSD4235G2
29). The

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