PSD4235G2-90UI STMicroelectronics, PSD4235G2-90UI Datasheet - Page 89

• Manufacturer Part Number: PSD4235G2-90UI
• Description: IC FLASH 4MBIT 90NS 80TQFP
• Manufacturer: STMicroelectronics

Specifications of PSD4235G2-90UI

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 4M (512K x 8)
• Speed: 90ns
• Interface: Parallel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TQFP, 80-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-1969

PSD4235G2
20.20
20.21
Table 47.
Enable Out
The Enable Out register can be read by the MCU. It contains the output enable values for a
given port. A '1' indicates the driver is in output mode. A '0' indicates the driver is in tri-state
and the pin is in input mode.
Ports A, B and C - functionality and structure
Ports A, B and C have similar functionality and structure, as shown in
can be configured to perform one or more of the following functions:
●
●
●
●
●
Mask macrocell
Input macrocell
Enable Out
MCU I/O mode
CPLD output - macrocells McellA7-McellA0 can be connected to Port A. McellB7-
McellB0 can be connected to Port B. External Chip Select (ECS7-ECS0) can be
connected to Port C or Port F.
CPLD input - Via the input macrocells (IMC).
Address In - Additional high address inputs using the input macrocells (IMC).
Open Drain/Slew Rate - pins PC7-PC0 can be configured to fast slew rate. Pins PA7-
PA0 can be configured to Open Drain mode.
Register Name
Port Data registers
A, B
A, B, C
A, B, C, F
Port
WRITE/READ - prevents loading into a given
Macrocell
READ - outputs of the input macrocells
READ - the output enable control of the port driver
MCU Access
Figure
28. The ports
I/O ports
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