AT49LH004-33JC SL383 Atmel, AT49LH004-33JC SL383 Datasheet - Page 20

• Manufacturer Part Number: AT49LH004-33JC SL383
• Description: IC FLASH 4MBIT 33MHZ 32PLCC
• Manufacturer: Atmel

Specifications of AT49LH004-33JC SL383

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 4M (512K x 8)
• Speed: 33MHz
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 32-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

11.2.1
11.2.2
11.2.3
20
AT49LH004
Read Lock
Write Lock
Lock Down
The default read status of all sectors upon power-up is read-unlocked. When a sector’s Read-
Lock bit is set (1 state), data cannot be read from that sector. An attempted read from a read-
locked sector will result in data 00H being read (note that a read failure is not reflected in the
Status Register). The read lock status can be unlocked by clearing (0 state) the Read-Lock bit,
provided that the Lock-Down bit has not been set. The current read lock status of a particular
sector can be determined by reading the corresponding Read-Lock bit.
The default write status of all sectors upon power-up is write-locked (1 state). Any program or
erase operations attempted on a locked sector will return an error in the Status Register (indi-
cating sector lock). The status of the locked sector can be changed to unlocked (0 state) by
clearing the Write-Lock bit, provided that the Lock-Down bit is not set. The current write lock
status of a particular sector can be determined by reading the corresponding Write-Lock bit.
The Write-Lock bit must be set to the desired protection state prior to starting a program or
erase operation because it is sampled at the beginning of the operation. Changing the state of
the Write-Lock bit during a program or erase operation may cause unpredictable results. The
new lock status will take place after the program or erase operation completes.
The write lock functions independently of the hardware write protect pins, TBL and WP. When
active, these pins take precedence over the register-based write lock function. Changing the
state of the TBL and WP pins will not affect the state of the Write-Lock bits. Reading the Sec-
tor Locking Registers will not read the state of the TBL or WP pins.
When in the FWH/LPC interface mode, the default lock down status of all sectors upon power-
up is not-locked-down (0 state). The Lock-Down bit for any sector may be set (1 state), but
only once, as future attempted changes to that Sector Locking Register will be ignored. Once
a sector’s Lock-Down bit is set, the Read-Lock and Write-Lock bits for that sector can no
longer be modified, and the sector is locked down in its current state of read and write acces-
sibility. The Lock-Down bit is only cleared upon a device reset with RST or INIT or after a
power-up. The current lock down status of a particular sector can be determined by reading
the corresponding Lock-Down bit.
3383D–FLASH–6/05